Semiconductor device with air gap and method for preparing the same
A semiconductor device includes a bottom barrier layer disposed over a semiconductor substrate, and a conductive contact disposed over the bottom barrier layer. The semiconductor device also includes a top barrier layer disposed over the conductive contact. The bottom barrier layer, the conductive contact, and the top barrier layer form an I-shaped structure. The semiconductor device further includes an isolation layer disposed adjacent to the I-shaped structure and extending into the semiconductor substrate. An air gap is surrounded by the isolation layer.
1. A semiconductor device, comprising:
a bottom barrier layer disposed over a semiconductor substrate;
a conductive contact disposed over the bottom barrier layer;
a top barrier layer disposed over the conductive contact, wherein the bottom barrier layer, the conductive contact, and the top barrier layer form an I-shaped structure; and
an isolation layer disposed adjacent to the I-shaped structure and extending into the semiconductor substrate, wherein an air gap is surrounded by the isolation layer.
2. The semiconductor device of claim 1 , wherein the isolation layer includes vanadium.
3. The semiconductor device of claim 1 , further comprising:
a first lining layer separating the isolation layer from the top barrier layer, the conductive contact, the bottom barrier layer, and the semiconductor substrate.
4. The semiconductor device of claim 3 , wherein the first lining layer is in direct contact with a top surface of the bottom barrier layer and a bottom surface of the top barrier layer.
5. The semiconductor device of claim 3 , further comprising:
a second lining layer covering the first lining layer and the isolation layer.
6. The semiconductor device of claim 5 , wherein a material of the first lining layer is the same as a material of the second lining layer.
7. The semiconductor device of claim 1 , wherein the bottom barrier layer has a middle line, a distance between the middle line and a top surface of the bottom barrier layer is substantially equal to a distance between the middle line and a bottom surface of the bottom barrier layer, and
wherein a bottommost point of the air gap is located between the middle line and the bottom surface of the bottom barrier layer.
8. The semiconductor device of claim 1 , wherein the top barrier layer has a middle line, a distance between the middle line and a top surface of the top barrier layer is substantially equal to a distance between the middle line and a bottom surface of the top barrier layer, and
wherein a topmost point of the air gap is located between the middle line and the bottom surface of the top barrier layer.
9. A semiconductor device, comprising:
a bottom barrier layer disposed over a semiconductor substrate;
a conductive contact disposed over the bottom barrier layer;
a top barrier layer disposed over the conductive contact, wherein a width of the bottom barrier layer and a width of the top barrier layer are greater than a width of the conductive contact; and
an isolation layer disposed adjacent to the conductive contact and extending into the semiconductor substrate, wherein an air gap is sealed in the isolation layer.
10. The semiconductor device of claim 9 , wherein the isolation layer includes a vanadium-containing oxide layer.
11. The semiconductor device of claim 9 , wherein a top surface of the isolation layer is concave.
12. The semiconductor device of claim 9 , wherein the width of the bottom barrier layer is substantially the same as the width of the top barrier layer.
13. The semiconductor device of claim 9 , wherein a material of the top barrier layer is the same as a material of the bottom barrier layer.
14. The semiconductor device of claim 13 , wherein the top barrier layer and the conductive contact include different materials.
15. The semiconductor device of claim 9 , further comprising:
an anti-reflective layer disposed over the top barrier layer; and
a first lining layer covering a top surface of the anti-reflective layer and separating the isolation layer from the top barrier layer, the conductive contact, the bottom barrier layer, and the semiconductor substrate.
16. The semiconductor device of claim 15 , further comprising:
a second lining layer covering the first lining layer and the isolation layer, wherein the second lining layer is separated from the anti-reflective layer by the first lining layer.
17. The semiconductor device of claim 16 , wherein the first lining layer and the second lining layer include Si 3 N 4 .