IP Library › Granted Patent US 12,213,307
Granted Patent B2
US 12,213,307 · App. 18/197,821 · Granted Jan 28, 2025

Semiconductor device with air gap and method for preparing the same

Inventor: Tse-Yao Huang (Taipei, TW)
Assignee: NANYA TECHNOLOGY CORPORATION
H10B12/482H10B12/30
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Quick Facts
Patent No.
US 12,213,307
App. No.
18/197,821
Granted
Jan 28, 2025
Kind
B2
Abstract

A semiconductor device includes a bottom barrier layer disposed over a semiconductor substrate, and a conductive contact disposed over the bottom barrier layer. The semiconductor device also includes a top barrier layer disposed over the conductive contact. The bottom barrier layer, the conductive contact, and the top barrier layer form an I-shaped structure. The semiconductor device further includes an isolation layer disposed adjacent to the I-shaped structure and extending into the semiconductor substrate. An air gap is surrounded by the isolation layer.

Claims (28)

1. A semiconductor device, comprising:

a bottom barrier layer disposed over a semiconductor substrate;

a conductive contact disposed over the bottom barrier layer;

a top barrier layer disposed over the conductive contact, wherein the bottom barrier layer, the conductive contact, and the top barrier layer form an I-shaped structure;

an isolation layer disposed adjacent to the I-shaped structure and extending into the semiconductor substrate, wherein an air gap is surrounded by the isolation layer;

a first lining layer separating the isolation layer from the top barrier layer, the conductive contact, the bottom barrier layer, and the semiconductor substrate; and

a second lining layer covering the first lining layer and the isolation layer.

2. The semiconductor device of claim 1 , wherein the isolation layer includes vanadium.

3. The semiconductor device of claim 1 , wherein the first lining layer is in direct contact with a top surface of the bottom barrier layer and a bottom surface of the top barrier layer.

4. The semiconductor device of claim 1 , wherein a material of the first lining layer is the same as a material of the second lining layer.

5. The semiconductor device of claim 1 , wherein the bottom barrier layer has a middle line, a distance between the middle line and a top surface of the bottom barrier layer is substantially equal to a distance between the middle line and a bottom surface of the bottom barrier layer, and

wherein a bottommost point of the air gap is located between the middle line and the bottom surface of the bottom barrier layer.

6. The semiconductor device of claim 1 , wherein the top barrier layer has a middle line, a distance between the middle line and a top surface of the top barrier layer is substantially equal to a distance between the middle line and a bottom surface of the top barrier layer, and

wherein a topmost point of the air gap is located between the middle line and the bottom surface of the top barrier layer.

7. A semiconductor device, comprising:

a bottom barrier layer disposed over a semiconductor substrate;

a conductive contact disposed over the bottom barrier layer;

a top barrier layer disposed over the conductive contact, wherein a width of the bottom barrier layer and a width of the top barrier layer are greater than a width of the conductive contact;

an isolation layer disposed adjacent to the conductive contact and extending into the semiconductor substrate, wherein an air gap is sealed in the isolation layer;

an anti-reflective layer disposed over the top barrier layer; and.

8. The semiconductor device of claim 7 , wherein the isolation layer includes a vanadium-containing oxide layer.

9. The semiconductor device of claim 7 , wherein a top surface of the isolation layer is concave.

10. The semiconductor device of claim 7 , wherein the width of the bottom barrier layer is substantially the same as the width of the top barrier layer.

11. The semiconductor device of claim 7 , wherein a material of the top barrier layer is the same as a material of the bottom barrier layer; wherein the top barrier layer and the conductive contact include different materials.

12. The semiconductor device of claim 7 , further comprising:

a first lining layer covering a top surface of the anti-reflective layer and separating the isolation layer from the top barrier layer, the conductive contact, the bottom barrier layer, and the semiconductor substrate.

13. The semiconductor device of claim 12 , further comprising:

a second lining layer covering the first lining layer and the isolation layer, wherein the second lining layer is separated from the anti-reflective layer by the first lining layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 16, 2023
From: HUANG, TSE-YAO
To: NANYA TECHNOLOGY CORPORATION
Reel/Frame 063653/0594 →
Continuity (2)
Division 17870073 · Jul 21, 2022
Related Publication 20240032284A1 · Jan 25, 2024
References Cited (7)
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