IP Library › Granted Patent US 12,216,844
Granted Patent B2
US 12,216,844 · App. 18/528,514 · Granted Feb 4, 2025

Sensor system

Inventors: Yoshio Nomura (Saitama, JP); Yuhi Hatano (Saitama, JP)
Assignee: Wacom Co., Ltd
G06F3/03545G06F3/0383G06F3/044
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Quick Facts
Patent No.
US 12,216,844
App. No.
18/528,514
Granted
Feb 4, 2025
Kind
B2
Abstract

Disclosed herein is a sensor system that detects a stylus on at least one panel surface having an effective region. The sensor system includes a memory device including computer-executable instructions, and a processor. The processor, when loaded with the computer-executable instructions, performs: and obtaining a position of the stylus and a pen pressure value indicating a pressure applied to a pen tip of the stylus; outputting the position and the pen pressure value to a host processor. In response to the position being outside the effective region, the processor performs processing to conceal from the host processor occurrence of at least one of a pen-down indicating the stylus contacting the panel surface and a pen-up indicating the stylus being removed from the panel surface.

Claims (19)

1. A processor configured to control a sensor system that detects a pointer on a first panel surface of a first display having a first effective region and a second panel surface of a second display having a second effective region, wherein the processor, when loaded with computer-executable instructions, performs:

obtaining a position of the pointer;

outputting the obtained position to a host processor;

wherein the first effective region has a first side interfacing a side of the second effective region and has a second side that does not interface the side of the second effective region;

in response to the obtained position being outside the first side of the first effective region, concealing from the host processor first information indicating the pointer being removed from the first panel surface; and

in response to the obtained position being outside the second side of the first effective region, outputting the first information to the host processor.

2. The processor according to claim 1 , which, when loaded with the computer-executable instructions, performs:

in response to the obtained position being outside the first side of the first effective region, not outputting the first information to the host processor for a defined period of time.

3. The processor according to claim 1 , which, when loaded with the computer-executable instructions, performs:

in response to the obtained position being outside the first side of the first effective region, outputting a replacement position within the first effective region or the second effective region corresponding to the obtained position to the host processor in place of the obtained position.

4. A processor configured to control a sensor system that detects a pointer on a first panel surface of a first display having a first effective region and a second panel surface of a second display having a second effective region, wherein the processor, when loaded with computer-executable instructions, performs:

obtaining a position of the pointer;

outputting the obtained position to a host processor;

wherein the first effective region has a first side interfacing a side of the second effective region and has a second side that does not interface the side of the second effective region; and

in response to the pointer leaving the first panel surface, outputting a first notification to the host processor, wherein the output of the first notification is suppressed more strongly when the pointer crosses the first side than when the pointer crosses the second side to leave the first panel surface.

5. The processor according to claim 4 , which, when loaded with the computer-executable instructions, performs:

in response to the obtained position being outside the first side of the first effective region, not outputting the first information to the host processor for a defined period of time.

6. The processor according to claim 4 , which, when loaded with the computer-executable instructions, performs:

in response to the obtained position being outside the first side of the first effective region, outputting a replacement position within the first effective region or the second effective region corresponding to the obtained position to the host processor in place of the obtained position.

Priority Claims (1)
JP 2020-007100 · Jan 20, 2020 · national
Continuity (4)
Continuation 18064807 · Dec 12, 2022
Continuation 17859697 · Jul 7, 2022
Continuation 17114352 · Dec 7, 2020
Related Publication 20240118755A1 · Apr 11, 2024
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