IP Library › Granted Patent US 12,218,151
Granted Patent B2
US 12,218,151 · App. 18/480,494 · Granted Feb 4, 2025

Display device and manufacturing method thereof

Inventors: So Young Koo (Yongin-si, KR); Jay Bum Kim (Yongin-si, KR); Kyung Jin Jeon (Incheon, KR); Eok Su Kim (Seoul, KR); Jun Hyung Lim (Seoul, KR)
Assignee: Samsung Display Co., Ltd.
H01L27/124H01L27/1288H01L33/62H01L2933/0066
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Quick Facts
Patent No.
US 12,218,151
App. No.
18/480,494
Granted
Feb 4, 2025
Kind
B2
Abstract

A display device according to an embodiment of the present disclosure includes: a substrate; a first conductive layer on the substrate; a first insulating layer on the first conductive layer; an active pattern on the first insulating layer and including a semiconductor material; a second insulating layer on the active pattern; and a second conductive layer on the second insulating layer, wherein the first insulating layer has a first opening exposing the first conductive layer, the second insulating layer has a second opening exposing the first conductive layer, a breadth of the first opening is different than a breadth of the second opening, and a side surface of the first opening and a side surface of the second opening are formed to a top surface of the first conductive layer.

Claims (20)

1. A manufacturing method of a display device, the method comprising:

forming a first conductive layer on a substrate;

forming a first insulating layer and a semiconductor layer on the first conductive layer;

forming a first mask pattern including a first portion and a second portion having different thicknesses, and having a first opening, on the semiconductor layer;

patterning the first insulating layer and the semiconductor layer by utilizing the first mask pattern as a mask to form a second opening of the first insulating layer;

removing the second portion of the first mask pattern to form a second mask pattern including a part of the first portion and having a thickness less than the thickness of the first portion;

patterning the semiconductor layer by utilizing the second mask pattern as a mask to form a semiconductor pattern;

forming a second insulating layer and a second conductive layer on the semiconductor pattern;

forming a third insulating layer on the second conductive layer; and

forming a third mask pattern on the third insulating layer and patterning the third insulating layer by utilizing the third mask pattern as a mask to form a third opening overlapping the second opening.

2. The manufacturing method of claim 1 , wherein:

the first opening is different in breadth from the second opening, and

in the forming of the third opening, a side surface of the first opening and a side surface of the second opening are formed to a top surface of the first conductive layer.

3. The manufacturing method of claim 1 , further comprising:

forming a third conductive layer on the third insulating layer,

wherein the second opening is different in breadth from the third opening,

in the forming of the third opening, the second opening and the third opening are connected to each other to form one opening, and

the one opening is filled with a material of the third conductive layer.

4. The manufacturing method of claim 1 , wherein

in the forming of the semiconductor pattern by patterning the semiconductor layer, a side surface of the semiconductor pattern is aligned with a side surface of the second opening of the first insulating layer.

Priority Claims (1)
KR 10-2020-0008722 · Jan 22, 2020 · national
Continuity (2)
Division 17085976 · Oct 30, 2020
Related Publication 20240030235A1 · Jan 25, 2024
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