IP Library › Granted Patent US 12,218,686
Granted Patent B2
US 12,218,686 · App. 18/138,702 · Granted Feb 4, 2025

Quasi-cyclic LDPC coding and decoding method and apparatus, and LDPC coder and decoder

Inventors: Liguang Li (Guangdong, CN); Jun Xu (Guangdong, CN); Jin Xu (Guangdong, CN)
Assignee: ZTE Corporation
H03M13/1168H03M13/036H03M13/618H03M13/6516H04L1/0003
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Quick Facts
Patent No.
US 12,218,686
App. No.
18/138,702
Granted
Feb 4, 2025
Kind
B2
Abstract

A quasi-cyclic LDPC coding and decoding method and apparatus, and an LDPC coder and decoder. The method includes: determining from a mother basis matrix set a basis matrix used for low density parity check (LDPC) coding (S 202 ), wherein the basis matrix used for LDPC coding includes a first-type element and a second-type element, the first-type element corresponds to an all-zero square matrix, the second-type element corresponds to a matrix obtained by means of a cyclic shift of a unit matrix according to a value of the second-type element, and dimensions of the all-zero square matrix and the unit matrix are equal; and performing LDPC coding on an information sequence to be coded according to the basis matrix used for LDPC coding, and/or performing LDPC decoding on a data sequence to be decoded according to the basis matrix used for LDPC coding (S 204 ).

Claims (23)

1. A quasi-cyclic LDPC decoding method, comprising:

receiving, over a radio transmission link, a data stream or a control stream comprising an encoded information sequence; and

performing low density parity check (LDPC) decoding on the encoded information sequence according to a basic matrix associated with LDPC coding, wherein the LDPC decoding mitigates distortions due to transmission over the radio transmission link and recovers the encoded information sequence,

wherein the basic matrix associated with the LDPC coding is from a mother basic matrix set, wherein the basic matrix comprises a first-type element corresponding to an all-zero square matrix and a second-type element corresponding to a matrix obtained by a cyclic shift of a unit matrix according to a value of the second-type element, wherein the value of the second-type element is based on an extension factor of the LDPC coding, and wherein dimensions of the all-zero square matrix and the unit matrix are equal, and

wherein the mother basic matrix set comprises A4 basic matrix subsets and each basic matrix subset comprises S basic matrices, wherein positions of the second-type element of all of the S basic matrices in a same basic matrix subset are same, and wherein A4 is an integer greater than 1.

2. The method of claim 1 , wherein the basic matrix associated with the LDPC coding is based on a preset parameter, wherein the preset parameter comprises a combination of a transport block size TBS and a code rate R, wherein the transport block size TBS is an integer that is greater than 0, and wherein the code rate R is a real number which is greater than 0 and less than 1.

3. The method of claim 1 , wherein the basic matrix associated with the LDPC coding is based on a preset parameter, wherein the preset parameter comprises a combination of a modulation and coding scheme MCS index number and a number of resource units NRB, wherein the MCS index number is used to indicate an MCS scheme, and wherein the number of resource units NRB is a number of system-configured resource blocks.

4. The method of claim 1 , wherein the basic matrix associated with the LDPC coding is based on a preset parameter, wherein the preset parameter comprises a combination of a code rate R and a number of resource units NRB, wherein the code rate R is a real number which is greater than 0 and less than 1, and wherein the number of resource units NRB is a number of system-configured resource blocks.

5. The method of claim 1 , wherein the mother basic matrix set comprises A4 basic matrix subsets, and a dimension of an i th basic matrix subset of the A4 basic matrix subsets respectively presents a matrix column number of NBi, a matrix row number of MBi, and a matrix system column number of KBi, where i=0, 1, . . . , (A4−1), and wherein MBi is an integer greater than 0, NBi is an integer greater than MBi, and KBi=NBi−MBi.

6. The method of claim 1 , wherein code rates supported by all of the S basic matrices in the same basic matrix subset are same.

7. The method of claim 1 , wherein all of the S basic matrices in the same basic matrix subset support different code lengths.

8. An apparatus for quasi-cyclic LDPC decoding, comprising:

a receiver configured to receive, over a radio transmission link, a data stream or a control stream comprising an encoded information sequence; and

a processor configured to:

perform low density parity check (LDPC) decoding on the encoded information sequence according to a basic matrix associated with LDPC coding, wherein the LDPC decoding mitigates distortions due to transmission over the radio transmission link and recovers the encoded information sequence,

wherein the basic matrix associated with the LDPC coding is from a mother basic matrix set, wherein the basic matrix comprises a first-type element corresponding to an all-zero square matrix and a second-type element corresponding to a matrix obtained by a cyclic shift of a unit matrix according to a value of the second-type element, wherein the value of the second-type element is based on an extension factor of the LDPC coding, and wherein dimensions of the all-zero square matrix and the unit matrix are equal, and

wherein the mother basic matrix set comprises A4 basic matrix subsets and each basic matrix subset comprises S basic matrices, wherein positions of the second-type element of all of the S basic matrices in a same basic matrix subset are same, and wherein A4 is an integer greater than 1.

9. The apparatus of claim 8 , wherein the basic matrix associated with the LDPC coding is based on a preset parameter, wherein the preset parameter comprises a combination of a transport block size TBS and a code rate R, wherein the transport block size TBS is an integer that is greater than 0, and wherein the code rate R is a real number which is greater than 0 and less than 1.

10. The apparatus of claim 8 , wherein the basic matrix associated with the LDPC coding is based on a preset parameter, wherein the preset parameter comprises a combination of a modulation and coding scheme MCS index number and a number of resource units NRB, wherein the MCS index number is used to indicate an MCS scheme, and wherein the number of resource units NRB is a number of system-configured resource blocks.

11. The apparatus of claim 8 , wherein the basic matrix associated with the LDPC coding is based on a preset parameter, wherein the preset parameter comprises a combination of a code rate R and a number of resource units NRB, wherein the code rate R is a real number which is greater than 0 and less than 1, and wherein the number of resource units NRB is a number of system-configured resource blocks.

12. The apparatus of claim 8 , wherein the mother basic matrix set comprises A4 basic matrix subsets, and a dimension of an i th basic matrix subset of the A4 basic matrix subsets respectively presents a matrix column number of NBi, a matrix row number of MBi, and a matrix system column number of KBi, where i=0, 1, . . . , (A4−1), and wherein MBi is an integer greater than 0, NBi is an integer greater than MBi, and KBi=NBi−MBi.

13. The apparatus of claim 8 , wherein code rates supported by all of the S basic matrices in the same basic matrix subset are same.

14. The apparatus of claim 8 , wherein all of the S basic matrices in the same basic matrix subset support different code lengths.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 24, 2023
From: LI, LIGUANG; XU, JUN; XU, JIN
To: ZTE CORPORATION
Reel/Frame 063422/0823 →
Priority Claims (1)
CN 201610877960.5 · Sep 30, 2016 · national
Continuity (3)
Continuation 17486652 · Sep 27, 2021
Continuation 16338333
Related Publication 20230344450A1 · Oct 26, 2023
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Cited By (1)
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