IP Library Granted Patent US 12,223,917
Granted Patent B2
US 12,223,917 · App. 18/380,419 · Granted Feb 11, 2025

Display driving integrated circuit configured to perform adaptive frame operation and operation method thereof

Inventors: Seongmin Cheon (Hwaseong-si, KR); Jihyun Ahn (Suwon-si, KR); Donghwy Kim (Hwaseong-si, KR); Jong-Kon Bae (Seoul, KR); Yunpyo Hong (Seoul, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
G09G3/3275G09G3/3266G09G2310/0243G09G2310/08G09G2320/02G09G2320/10G09G2360/18G09G2370/00
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Quick Facts
Patent No.
US 12,223,917
App. No.
18/380,419
Granted
Feb 11, 2025
Kind
B2
Abstract

A display driving integrated circuit performs an adaptive frame operation. An operation method of the display driving integrated circuit includes outputting current frame data to an external display panel, starting to receive next frame data from an external device after a first time point, the first time point being a time point when a first time period elapses, the first time period immediately following a second time point at which the current frame data are completely output, and generating a vertical synchronization signal at a third time point synchronized with a cycle of an emission control signal, in response to starting to receive the next frame data.

Claims (47)

1. An operation method of a display driving integrated circuit which performs an adaptive frame operation that adapts for frame delays in a given frame rate, the operation method comprising:

outputting first frame data to an external display panel;

starting to receive second frame data from an external device at a third time point being after a second time point when a vertical front porch (VFP) passes, the VFP beginning at a first time point when the first frame data are completely output, the second frame data being delayed with respect the given frame rate; and

generating an internal vertical synchronization signal at a fourth time point in response to an external vertical synchronization signal received from the external device,

wherein the fourth time point is when an extended VFP elapses from the first second time point,

wherein the display driving integrated circuit is provided an emission control signal corresponding to target luminance of the external display panel,

wherein the display driving integrated circuit controls the emission control signal such that the emission control signal has a first level during a first period and has a second level different from the first level during a second period,

wherein the first period is between the second time point and the third time point and the second period is between the third time point and the fourth time point,

wherein the first level is determined based on a target duty ratio corresponding to the target luminance of the external display panel, and

wherein the display driving integrated circuit communicates with the external device in a video mode supported by a mobile industry processor interface (MIPI) D-Phy physical layer.

2. The operation method of claim 1 , wherein the VFP is a given time.

3. The operation method of claim 1 , further comprising:

outputting the second frame data to the external display panel in response to the internal vertical synchronization signal generated at the fourth time point.

4. The operation method of claim 3 , wherein the second frame data is output to the external display panel after a vertical back porch (VBP) elapses from the fourth time point, in response to the internal vertical synchronization signal generated at the fourth time point.

5. The operation method of claim 1 , further comprising:

before the first frame data is output to the external display panel;

outputting 0-th frame data to the external display panel;

starting to receive the first frame data from the external device at a time period between a fifth time point and a sixth time point; and

generating the internal vertical synchronization signal at the sixth time point, in response to the external vertical synchronization signal,

wherein the fifth time point is when the 0-th frame data is completely output, and

wherein the sixth time point is when the VFP elapses from the fifth time point.

6. The operation method of claim 5 , wherein the first frame data is output to the external display panel after a vertical back porch (VBP) elapses from the sixth time point, in response to the internal vertical synchronization signal generated at the sixth time point.

7. The operation method of claim 1 , wherein the extended VFP is longer than the VFP.

8. The operation method of claim 1 , wherein a first duty ratio of the emission control signal corresponds to a level corresponding to the target luminance of the external display panel.

9. The operation method of claim 8 , wherein a second duty ratio of the emission control signal during the extended VFP is identical to the first duty ratio of the emission control signal.

10. The operation method of claim 1 , wherein the target luminance of the external display panel is uniformly maintained during the first frame data and the second frame data are displayed by the external display panel.

11. An operation method of a display driving integrated circuit which performs an adaptive frame operation that adapts for frame delays in a given frame rate, the operation method comprising:

sequentially receiving a plurality of frame data from an external device in the given frame rate, and sequentially outputting the plurality of frame data to an external display panel in the given frame rate;

receiving first frame data from the external device, the first frame data being delayed with respect the given frame rate;

generating an internal vertical synchronization signal in response to an external vertical synchronization signal received from the external device; and

outputting the first frame data to the external display panel in response to the internal vertical synchronization signal,

wherein the display driving integrated circuit is provided an emission control signal corresponding to target luminance of the external display panel,

wherein the display driving integrated circuit controls the emission control signal such that the emission control signal has a first level between a second time point and a third time point and has a second level different from the first level between the third time point and a fourth time point

wherein a first time point is when previous frame data are completely output, the second time point is when a vertical front porch (VFP) beginning at the first time point passes, the third time point is a time point when starting to receive the first frame data, and the fourth time point is when the internal vertical synchronization signal is generated,

wherein the first level is determined based on a target duty ratio corresponding to the target luminance of the external display panel, and

wherein the display driving integrated circuit communicates with the external device in a video mode supported by a mobile industry processor interface (MIPI) D-Phy physical layer.

12. The operation method of claim 11 , wherein the VFP is a given time.

13. The operation method of claim 11 , wherein a duty ratio of the emission control signal between the second time point and the fourth time point corresponds to a target luminance of the external display panel.

14. A display driving integrated circuit comprising:

an interface circuit configured to receive first frame data from an external device, the first frame data being delayed with respect to a given frame rate;

a timing controller configured to generate an internal vertical synchronization signal in response to an external vertical synchronization signal received from the external device;

a source driver configured to output the first frame data to an external display panel in response to the internal vertical synchronization signal; and

an emission control driver configured to output an emission control signal corresponding to target luminance,

wherein the emission control driver is further configured to control the emission control signal such that the emission control signal has a first level between a second time point and a third time point and has a second level different from the first level between the third time point and a fourth time point,

wherein a first time point is when previous frame data are completely output, the second time point is when a vertical front porch (VFP) beginning at the first time point passes, the third time point is a time point when starting to receive the first frame data, and the fourth time point is when the internal vertical synchronization signal is generated,

wherein the first level is determined based on a target duty ratio corresponding to the target luminance of the external display panel, and

wherein the display driving integrated circuit communicates with the external device in a video mode supported by a mobile industry processor interface (MIPI) D-Phy physical layer.

Priority Claims (1)
KR 10-2020-0101954 · Aug 13, 2020 · national
Continuity (2)
Continuation 17398947 · Aug 10, 2021
Related Publication 20240046885A1 · Feb 8, 2024
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