IP Library › Granted Patent US 12,229,541
Granted Patent B2
US 12,229,541 · App. 18/333,709 · Granted Feb 18, 2025

Dual architecture function pointers having consistent reference addresses

Inventors: Pedro Miguel Sequeira De Justo Teixeira (Kirkland, WA); Darek Josip Mihocka (Mercer Island, WA); Jon Robert Berry (Woodinville, WA); Russell Charles Hadley (Bellevue, WA); James David Cleary (Seattle, WA); Clarence Siu Yeen Dang (Newcastle, WA)
Assignee: Microsoft Technology Licensing, LLC
G06F8/47G06F8/447
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,229,541
App. No.
18/333,709
Granted
Feb 18, 2025
Kind
B2
Abstract

Using a common reference address when processing calls between a native application binary interface (ABI) and a foreign ABI. Based on a caller calling using a reference address, a lookup structure is used to determine whether the reference address is within a memory range storing native code and that the callee is native, or a memory range not storing native code and that the callee is foreign. Execution of a callee is initiated based on one of (i) calling the callee using the reference address within an emulator when the caller is native and the callee is foreign; (ii) calling an entry thunk when the caller is foreign and the callee is native; (iii) calling an exit thunk when the caller is native and the callee is foreign; or (iv) directly calling the callee using the reference address when the caller is native and the callee is native.

Claims (47)

1. A method implemented in a computer system that includes a processor implementing a native ISA (instruction set architecture), comprising:

determining that a callee function corresponds to a native ABI (application binary interface) that corresponds to the native ISA and that has a first calling convention, based at least on identifying a call that targets a reference memory address for the callee function; and

based on a caller function corresponding to a foreign ABI that corresponds to a foreign ISA and that has a second calling convention, initiating execution of the callee function calling an entry thunk that:

adapts the second calling convention to the first calling convention, and

directly calls the callee function using the reference memory address.

2. The method of claim 1 , wherein the callee function is determined to correspond to the native ABI based on a lookup structure indicating that the reference memory address is contained within a first memory range storing native code.

3. The method of claim 2 , wherein the lookup structure comprises at least one of:

a bitmap,

a hash table, or

a binary tree.

4. The method of claim 1 , wherein the callee function is determined to correspond to the native ABI based on identifying a fast-forward sequence at the reference memory address.

5. The method of claim 4 , wherein the method further comprises updating the reference memory address with a new reference memory address obtained from the fast-forward sequence.

6. The method of claim 1 , wherein the method further comprises identifying a location of the entry thunk based at least on:

reading a block of memory immediately preceding the reference memory address, and

determining, from the block of memory, an offset or a pointer to the location of the entry thunk.

7. A method implemented in a computer system that includes a processor implementing a native ISA (instruction set architecture), comprising:

determining that a callee function corresponds to a foreign ABI (application binary interface) that corresponds to a foreign ISA and that has a first calling convention, based at least on identifying a call that targets a reference memory address for the callee function; and

based on a caller function corresponding to a native ABI that corresponds to the native ISA and that has a second calling convention, initiating execution of the callee function by calling an exit thunk that:

adapts the second calling convention of the native ABI to the first calling convention of the foreign ABI, and

invokes an emulator to directly call the callee function using the reference memory address.

8. The method of claim 7 , wherein the callee function is determined to correspond to the native ABI based on a lookup structure indicating that the reference memory address is contained within a second memory range not storing native code.

9. The method of claim 8 , wherein the lookup structure comprises at least one of:

a bitmap,

a hash table, or

a binary tree.

10. The method of claim 7 , wherein the method further comprises determining whether a fast-forward sequence is identifiable at the reference memory address.

11. The method of claim 7 , wherein a location of the exit thunk is contained within the caller function.

12. A computer system comprising:

a processor implementing a native ISA (instruction set architecture); and

a hardware storage device that stores computer-executable instructions that are executable by the processor to use a common reference memory address when processing calls within a process that supports execution of both (i) native code targeting a native ABI (application binary interface) that corresponds to the native ISA and that has a first calling convention, and (ii) foreign code targeting a foreign ABI that corresponds to a foreign ISA and that has a second calling convention, including:

determining whether a callee function corresponds to the native ABI or to the foreign ABI, based at least on identifying a call that targets a reference memory address for the callee function; and

initiating execution of the callee function based on performing one of:

when a caller function corresponds to the foreign ABI, and when the callee function is determined to correspond to the foreign ABI, directly calling the callee function using the reference memory address within an emulator;

when the caller function corresponds to the foreign ABI, and when the callee function is determined to correspond to the native ABI, calling an entry thunk that (i) adapts the second calling convention to the first calling convention and then (ii) directly calls the callee function using the reference memory address;

when the caller function corresponds to the native ABI, and when the callee function is determined to correspond to the foreign ABI, calling an exit thunk that (i) adapts the first calling convention of the native ABI to the second calling convention of the foreign ABI and then (ii) invokes the emulator to directly call the callee function using the reference memory address; or

when the caller function corresponds to the native ABI, and when the callee function is determined to correspond to the native ABI, directly calling the callee function using the reference memory address.

13. The computer system of claim 12 , wherein the caller function corresponds to the foreign ABI and the callee function is determined to correspond to the foreign ABI, and wherein initiating execution of the callee function comprises directly calling the callee function using the reference memory address within the emulator.

14. The computer system of claim 12 , wherein the caller function corresponds to the foreign ABI and the callee function is determined to correspond to the native ABI, and wherein initiating execution of the callee function comprises calling the entry thunk.

15. The computer system of claim 12 , wherein the caller function corresponds to the native ABI and the callee function is determined to correspond to the foreign ABI, and wherein initiating execution of the callee function comprises calling the exit thunk.

16. The computer system of claim 12 , wherein the caller function corresponds to the native ABI and the callee function is determined to correspond to the native ABI, and wherein initiating execution of the callee function comprises directly calling the callee function using the reference memory address.

17. The computer system of claim 12 , wherein the callee function is determined to correspond to the native ABI based on a lookup structure indicating that the reference memory address is contained within a first memory range storing native code.

18. The computer system of claim 17 , wherein the lookup structure comprises at least one of:

a bitmap,

a hash table, or

a binary tree.

19. The computer system of claim 12 , wherein the callee function is determined to correspond to the native ABI based on identifying a fast-forward sequence at the reference memory address.

20. The computer system of claim 19 , wherein the computer-executable instructions are also executable by the processor to update the reference memory address with a new reference memory address obtained from the fast-forward sequence.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 15, 2023
From: SEQUEIRA DE JUSTO TEIXEIRA, PEDRO MIGUEL; MIHOCKA, DAREK JOSIP; BERRY, JON ROBERT; HADLEY, RUSSELL CHARLES; CLEARY, JAMES DAVID; DANG, CLARENCE SIU YEEN
To: MICROSOFT TECHNOLOGY LICENSING, LLC
Reel/Frame 063966/0054 →
Continuity (3)
Continuation 17550452 · Dec 14, 2021
Continuation 17008270 · Aug 31, 2020
Related Publication 20230418581A1 · Dec 28, 2023
References Cited (32)
US 5933642A · Greenbaum et al. · 1999 [cited by applicant]
US 9129062B1 · Adams · 2015 [cited by examiner]
US 10552207B2 · Tamir et al. · 2020 [cited by applicant]
US 10713213B2 · Tamir et al. · 2020 [cited by applicant]
US 20090304303A1 · Sykes · 2009 [cited by applicant]
US 20130080805A1 · Vick et al. · 2013 [cited by applicant]
US 20140046649A1 · Wu · 2014 [cited by examiner]
US 20150309812A1 · Gschwind · 2015 [cited by examiner]
US 20150379169A1 · Wu · 2015 [cited by examiner]
US 20160117201A1 · Gschwind · 2016 [cited by examiner]
US 20160124850A1 · Gschwind · 2016 [cited by examiner]
US 20160132245A1 · Gschwind · 2016 [cited by examiner]
US 20160132302A1 · Gschwind · 2016 [cited by examiner]
US 20160364276A1 · Wu et al. · 2016 [cited by applicant]
US 20170115975A1 · Rose · 2017 [cited by examiner]
US 20180373514A1 · Gordon et al. · 2018 [cited by applicant]
US 20190065347A1 · Mola · 2019 [cited by examiner]
US 20190087347A1 · Gschwind · 2019 [cited by examiner]
Communication pursuant to Article 94(3) received for European Application No. 21737846.2, mailed on Jan. 12, 2024, 6 pages. [cited by applicant]
Communication under Rule 71(3) EPC Received for European Application No. 16778968.4, mailed on Jul. 29, 2019, 05 pages. [cited by applicant]
Communication under Rule 71(3) EPC Received for European Application No. 19210044.4, mailed on Dec. 14, 2021, 07 Pages. [cited by applicant]
Decision to grant a European patent pursuant to Article 97(1) Received for European Application No. 16778968.4, mailed on Nov. 28, 2019, 02 pages. [cited by applicant]
Notice of Allowance mailed on Jan. 1, 2019, in U.S. Appl. No. 14/873,100, 10 pages. [cited by applicant]
Notice of Allowance mailed on Oct. 27, 2021, in U.S. Appl. No. 17/008,163, 09 pages. [cited by applicant]
Notice of Allowance mailed on Oct. 29, 2012, in U.S. Appl. No. 12/133,358, 11 pages. [cited by applicant]
U.S. Appl. No. 17/008,163, filed Aug. 31, 2020. [cited by applicant]
U.S. Appl. No. 17/008,270, filed Aug. 31, 2020. [cited by applicant]
U.S. Appl. No. 17/008,346, filed Aug. 31, 2020. [cited by applicant]
U.S. Appl. No. 17/550,452, filed Dec. 14, 2021. [cited by applicant]
U.S. Appl. No. 14/873,100, filed Oct. 1, 2015. [cited by applicant]
U.S. Appl. No. 16/403,158, filed May 3, 2019. [cited by applicant]
Communication under Rule 71(3) EPC Received for European Application No. 21737846.2, mailed on Nov. 4, 2024, 8 pages. [cited by applicant]