Display substrate and preparation method therefor, and display apparatus
A display substrate, includes: a display region. The display region includes a plurality of sub-pixels disposed on a substrate, a plurality of first signal lines extending in a first direction, and a plurality of data lines extending in a second direction. At least one sub-pixel includes a driving circuit, and the driving circuit includes a plurality of transistors and at least one storage capacitor. The transistor at least includes a first conductive layer and a second conductive layer. The plurality of first signal lines is located in a third conductive layer. The third conductive layer is located on a side of a control electrode of a transistor of the driving circuit away from the substrate.
1. A display substrate, comprising: a display region, wherein:
the display region comprises a plurality of sub-pixels disposed on a substrate, a plurality of first signal lines extending in a first direction, and a plurality of data lines extending in a second direction; at least one sub-pixel of the plurality of sub-pixels comprises a driving circuit, the driving circuit comprises a plurality of transistors and at least one storage capacitor; the transistors at least comprise a first conductive layer and a second conductive layer; the first direction is perpendicular to the second direction;
the plurality of first signal lines are located in a third conductive layer, the third conductive layer are located on a side of a control electrodes of at least one transistor of the plurality of transistors of the driving circuit away from the substrate; and
the first conductive layer is located between the substrate and the third conductive layer; and the first signal lines located in the third conductive layer transmit signals to at least one sub-pixel through the first conductive layer.
2. The display substrate according to claim 1 , wherein the third conductive layer comprises a first electrode or a second electrode of at least one transistor of the driving circuit.
3. The display substrate according to claim 1 , wherein the first conductive layer comprises a control electrode of at least one transistor of the driving circuit; and the first signal lines are connected to the control electrode of at least one transistor of the driving circuit.
4. The display substrate according to claim 1 , wherein:
the display region further comprises a plurality of first power lines extending in the second direction, and
the data lines and the first power lines are located on a side of an electrode of the storage capacitor closest to the substrate away from the substrate.
5. The display substrate according to claim 4 , wherein:
the display region further comprises at least one power connection portion electrically connected to the first power lines; and
an orthographic projection of the first power lines on the substrate is at least partially overlapped with an orthographic projection of the power connection portion on the substrate.
6. The display substrate according to claim 5 , wherein:
the display region further comprises: a fourth conductive layer disposed on the substrate; and
at least one conductive layer between the fourth conductive layer and the first conductive layer.
7. The display substrate according to claim 6 , wherein the power connection portion is located in a second conductive layer between the first conductive layer and the fourth conductive layer.
8. The display substrate according to claim 7 , wherein:
a third insulating layer is disposed between the second conductive layer and the third conductive layer; and
the first power lines are electrically connected to the power connection portion at least through a via hole provided in the third insulating layer.
9. The display substrate according to claim 4 , wherein the first power line forms a double-layer wiring with an adjacent conductive layer within a region where the sub-pixels are located.
10. The display substrate according to claim 9 , wherein orthographic projections of a portion of the double-layer wiring of the first power line and the storage capacitor on the substrate are at least partially aligned in the first direction.
11. The display substrate according to claim 5 , wherein the power connection portion is electrically connected to a first electrode of a third switching transistor of the driving circuit.
12. The display substrate according to claim 11 , wherein the power connection portion and a second electrode of the storage capacitor are interconnected to form an integral structure.
13. The display substrate according to claim 5 , wherein the plurality of first signal lines comprise a plurality of scan lines and a reset signal line.
14. The display substrate according to claim 13 , wherein in the second direction, the orthographic projection of the power connection portion on the substrate is located between orthographic projections of at least one of the scan lines and the reset signal line, which are connected to sub-pixels in a same row, on the substrate.
15. The display substrate according to claim 5 , wherein the at least one power connection portion is connected to a plurality of sub-pixels.
16. The display substrate according to claim 15 , wherein the at least one power connection portion is electrically connected to at least two of three sub-pixels of the plurality of sub-pixels at the same time.
17. The display substrate according to claim 16 , wherein the plurality of sub-pixels at least comprise a first sub-pixel, a second sub-pixel, and a third sub-pixel;
the at least one power connection portion is electrically connected to the first sub-pixel, the second sub-pixel, and the third sub-pixel, respectively.
18. The display substrate according to claim 17 , wherein the first sub-pixel is red, the second sub-pixel is green, and the third sub-pixel is blue.
19. A display device, comprising the display substrate according to claim 1 .