Method for manufacturing semiconductor structure, semiconductor structure, and memory
A method for manufacturing a semiconductor structure includes the following operations. A substrate is provided. A lower electrode is formed on the substrate. A capacitor dielectric layer is formed on a surface of the lower electrode. The capacitor dielectric layer includes at least one zirconium oxide layer. The capacitor dielectric layer is subjected with microwave annealing treatment to convert a crystal phase of zirconium oxide to a tetragonal crystal phase. An upper electrode is formed on a surface of the capacitor dielectric layer.
1. A method for manufacturing a semiconductor structure, comprising:
providing a substrate;
forming a lower electrode on the substrate;
forming a capacitor dielectric layer on a surface of the lower electrode, wherein the capacitor dielectric layer comprises at least one zirconium oxide layer;
subjecting the capacitor dielectric layer with a microwave annealing treatment performed in a copper chamber to convert a crystal phase of zirconium oxide to a tetragonal crystal phase; and
forming an upper electrode on a surface of the capacitor dielectric layer.
2. The method of claim 1 , wherein the microwave annealing treatment is performed under a power of 700 W to 1,400 W for 250 s to 310 s.
3. The method of claim 1 , wherein the substrate having the lower electrode and the capacitor dielectric layer formed thereon has a temperature not greater than 400° C., during the microwave annealing treatment.
4. The method of claim 1 , wherein the capacitor dielectric layer further comprises at least one first dielectric layer, and the first dielectric layer and the zirconium oxide layer are stacked alternately.
5. The method of claim 4 , wherein the first dielectric layer comprises an aluminum oxide layer.
6. The method of claim 4 , wherein the capacitor dielectric layer comprises two the zirconium oxide layers and one the first dielectric layer, and the zirconium oxide layers and the first dielectric layer are stacked alternately.
7. The method of claim 4 , wherein each the first dielectric layer is formed with a thickness of 1 nm to 5 nm, and each of the zirconium oxide layers is formed with a thickness of 15 nm to 25 nm.
8. A method for manufacturing a semiconductor structure, comprising:
providing a substrate;
forming a lower electrode on the substrate;
forming a capacitor dielectric layer on a surface of the lower electrode, wherein the capacitor dielectric layer comprises at least one zirconium oxide layer;
subjecting the capacitor dielectric layer with a microwave annealing treatment to convert a crystal phase of zirconium oxide to a tetragonal crystal phase; and
forming an upper electrode on a surface of the capacitor dielectric layer;
wherein the substrate having the lower electrode and the capacitor dielectric layer formed thereon has a temperature not greater than 400° C., during the microwave annealing treatment.
9. The method of claim 8 , wherein the microwave annealing treatment is performed under a power of 700 W to 1,400 W for 250 s to 310 s.
10. The method of claim 8 , wherein the capacitor dielectric layer further comprises at least one first dielectric layer, and the first dielectric layer and the zirconium oxide layer are stacked alternately.
11. The method of claim 10 , wherein the first dielectric layer comprises an aluminum oxide layer.
12. The method of claim 10 , wherein the capacitor dielectric layer comprises two the zirconium oxide layers and one the first dielectric layer, and the zirconium oxide layers and the first dielectric layer are stacked alternately.
13. The method of claim 10 , wherein each the first dielectric layer is formed with a thickness of 1 nm to 5 nm, and each of the zirconium oxide layers is formed with a thickness of 15 nm to 25 nm.