Active gate driver for wide band gap power semiconductor devices
A gate drive circuit of a wide band gap power device (IGBT) includes a buffer, a di/dt sensing network, a turn-on circuit portion and turn-off circuit portion. The buffer, responsive to turn-on, supplies a first current via the first current path to the gate of the IGBT, and responsive to turn-off ceases the supply of the first current. The di/dt sensing network receives a feedback control signal representative of a voltage measurement across a parasitic inductance that exists between a Kelvin emitter and a power emitter of the IGBT. The turn-on circuit portion, responsive to turn-on and a parasitic inductance of zero volts, supplies a second current via a second current path to the gate of the IGBT. The turn-off circuit portion, responsive to turn-off and a parasitic inductance of zero volts, discharges a gate capacitance of the IGBT through both the first current path and a third current path.
1. A gate drive circuit for a wide band gap (WBG) power device in the form of an insulated gate bipolar transistor (IGBT), comprising:
a buffer coupled via a first current path to a gate of the IGBT, the buffer capable of being supplied with a turn-on command and a turn-off command, the buffer supplying a first current via the first current path to the gate of the IGBT upon being supplied with the turn-on command and stopping supply of the first current upon being supplied with the turn-off command;
a di/dt sensing network receiving a feedback control signal representative of a voltage measurement across a parasitic inductance that exists between a Kelvin emitter and a power emitter of the IGBT;
a turn-on circuit portion that, upon the buffer being supplied with the turn-on command and the di/dt sensing network receiving a feedback control signal representative of zero volts measured across the parasitic inductance, supplies a second current via a second current path to the gate of the IGBT in addition to the first current supplied by the buffer; and
a turn-off circuit portion, upon the buffer receiving the turn-off command and the di/dt sensing network receiving a feedback control signal representative of zero volts measured across the parasitic inductance, discharges a gate capacitance of the IGBT through both the first current path and a third current path.
2. The gate driver circuit of claim 1 , wherein the turn-on circuit portion includes a logic gate output to activate a first level shifter.
3. The gate driver circuit of claim 2 , wherein the logic gate comprises an AND gate that receives an input from the power emitter of the IGBT and a turn-on/turn-off command supplied to the buffer.
4. The gate driver circuit of claim 2 , wherein the activated first level shifter of the turn-on circuit portion activates a source follower and a gate charger to supply the second current.
5. The gate driver circuit of claim 1 , wherein the turn-off circuit portion includes a logic gate output to activate a second level shifter.
6. The gate driver circuit of claim 5 , wherein the logic gate comprises a NOR gate that receives an input from the power emitter of the IGBT and a turn-on/turn-off command supplied to the buffer.
7. The gate driver circuit of claim 5 , wherein the activated second level shifter of the turn-off circuit portion activates a gate discharger to provide the third current path.
8. A power converter comprising:
a wide band gap (WBG) power device upper switch having an input supplied by a first drive circuit;
a WBG power device lower switch having an input supplied by a second drive circuit;
wherein each of the first and second drive circuits comprise:
a totem pole gate driver that supplies a first current on a first current path to a gate of the respective upper or lower WBG power device switch;
first and second auxiliary diodes; and
first and second auxiliary transistors,
wherein the first and second auxiliary diodes and transistors operate in conjunction with a feedback control signal representative of a voltage measurement across a parasitic inductance that exists between a Kelvin emitter and a power emitter of the respective upper or lower WBG power device switch and a turn-on/turn-off command of the totem pole gate driver to provide a second current path to deliver a second current to the gate of the respective upper or lower WBG power device switch during the turn-on command of the totem pole gate driver and to provide third current path to discharge a gate capacitance of the respective upper or lower WBG power device switched during the turn-off command of the totem pole gate driver.
9. A power converter comprising:
a wide band gap (WBG) power device upper switch having an input supplied by a first drive circuit;
a WBG power device lower switch having an input supplied by a second drive circuit;
wherein each of the first and second drive circuits comprise:
a buffer coupled via a first current path to a gate of the respective upper or lower WBG power device switch, the buffer capable of being supplied with a turn-on command and a turn-off command, the buffer supplying a first current via the first current path to the gate of the respective upper or lower WBG power device switch upon being supplied with the turn-on command and stopping supply of the first current upon being supplied with the turn-off command;
a di/dt sensing network receiving a feedback control signal representative of a voltage measurement across a parasitic inductance that exists between a Kelvin emitter and a power emitter of the respective upper or lower WBG power device switch;
a turn-on circuit portion that, upon the buffer being supplied with the turn-on command and the di/dt sensing network receiving a feedback control signal representative of zero volts measured across the parasitic inductance, supplies a second current via a second current path to the gate of the respective upper or lower WBG power device switch in addition to the first current supplied by the buffer; and
a turn-off circuit portion, upon the buffer receiving the turn-off command and the di/dt sensing network receiving a feedback control signal representative of zero volts measured across the parasitic inductance, discharges a gate capacitance of the respective upper or lower WBG power device switch through both the first current path and a third current path.
10. The power converter of claim 9 , wherein the turn-on circuit portion includes a logic gate output to activate a first level shifter.
11. The power converter of claim 10 , wherein the logic gate comprises an AND gate that receives an input from the power emitter of the IGBT and a turn-on/turn-off command supplied to the buffer.
12. The power converter of claim 10 , wherein the activated first level shifter of the turn-on circuit portion activates a source follower and a gate charger to supply the second current.
13. The power converter of claim 9 , wherein the turn-off circuit portion includes a logic gate output to activate a second level shifter.
14. The power converter of claim 13 , wherein the logic gate comprises a NOR gate that receives an input from the power emitter of the IGBT and a turn-on/turn-off command supplied to the buffer.
15. The power converter of claim 13 , wherein the activated second level shifter of the turn-off circuit portion activates a gate discharger to provide the third current path.