IP Library › Granted Patent US 12,232,330
Granted Patent B2
US 12,232,330 · App. 17/805,004 · Granted Feb 18, 2025

Method for manufacturing semiconductor structure, semiconductor structure and semiconductor memory

Inventors: Xiaoguang Wang (Hefei, CN); Huihui Li (Hefei, CN); Dinggui Zeng (Hefei, CN); Jiefang Deng (Hefei, CN); Kanyu Cao (Hefei, CN)
Assignees: CHANGXIN MEMORY TECHNOLOGIES, INC.; BEIJING SUPERSTRING ACADEMY OF MEMORY TECHNOLOGY
H10B61/00H10N50/01
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Quick Facts
Patent No.
US 12,232,330
App. No.
17/805,004
Granted
Feb 18, 2025
Kind
B2
Abstract

A method for manufacturing a semiconductor structure includes the following: providing a substrate; forming an MTJ structure and a first mask structure in sequence on the substrate; performing a patterning process on the first mask structure to form a first pattern extending in a first direction; transferring the first pattern to the MTJ structure; forming a second mask structure on the MTJ structure; performing a patterning process on the second mask structure to form a second pattern extending in a second direction, the first direction intersecting the second direction and being not perpendicular to the second direction; and performing a patterning process on the MTJ structure by utilizing the second pattern to form a cellular MTJ array, the first pattern and the second pattern together forming a cellular pattern.

Claims (62)

1. A method for manufacturing a semiconductor structure, comprising:

providing a substrate;

forming a magnetic tunnel junction (MTJ) structure and a first mask structure in sequence on the substrate;

performing a patterning process on the first mask structure to form a first pattern extending in a first direction;

transferring the first pattern to the MTJ structure;

forming a second mask structure on the MTJ structure;

performing a patterning process on the second mask structure to form a second pattern extending in a second direction, the first direction intersecting the second direction, and the first direction being not perpendicular to the second direction; and

performing a patterning process on the MTJ structure by utilizing the second pattern to form a cellular MTJ array, the first pattern and the second pattern together forming a cellular pattern.

2. The method according to claim 1 , wherein the MTJ structure comprises an MTJ layer and an MTJ mask layer, wherein the MTJ layer is formed on the substrate, and the MTJ mask layer is formed on the MTJ layer.

3. The method according to claim 2 , wherein performing a patterning process on the first mask structure to form the first pattern extending in the first direction comprises:

performing an etching process on the first mask structure in the first direction to form a patterned first mask structure;

forming, on the MTJ mask layer, a first dielectric layer covering the first mask structure, first trenches arranged at intervals with the first mask structure being provided on a surface of the first dielectric layer;

removing the first dielectric layer located on a plane of top of the first mask structure and located below the first trenches; and

removing the first mask structure to form the first pattern extending in the first direction.

4. The method according to claim 3 , wherein transferring the first pattern to the MTJ structure comprises:

transferring the first pattern to the MTJ mask layer by taking the first dielectric layer as a mask.

5. The method according to claim 4 , wherein a height ratio of the MTJ mask layer to the MTJ layer ranges from 1.5:1 to 3:1 before transferring of the second pattern to the MTJ structure to form the cellular MTJ array; and

the height ratio of the MTJ mask layer to the MTJ layer ranges from 0.5:1 to 1.5:1 after transferring of the second pattern to the MTJ structure to form a cellular MTJ array.

6. The method according to claim 4 , wherein before forming the second mask structure on the MTJ structure, the method further comprises:

forming, on the MTJ layer, a first sacrificial layer covering the MTJ mask layer and the first dielectric layer.

7. The method according to claim 6 , wherein the second mask structure comprises a first photoresist layer and a second dielectric layer; and

wherein performing a patterning process on the second mask structure to form the second pattern extending in the second direction comprises:

forming the first photoresist layer on the first sacrificial layer and the first dielectric layer;

performing an etching process on the first photoresist layer in the second direction to form a patterned first photoresist layer;

forming, on the first sacrificial layer, the second dielectric layer covering the first photoresist layer, second trenches arranged at intervals with the first photoresist layer being provided on a surface of the second dielectric layer;

removing the second dielectric layer located on a plane of top of the first photoresist layer and located below the second trenches; and

removing the first photoresist layer to form the second pattern extending in the second direction.

8. The method according to claim 7 , wherein performing a patterning process on the MTJ structure by utilizing the second pattern to form the cellular MTJ array comprises:

patterning the first dielectric layer, the first sacrificial layer and the MTJ mask layer by taking the second dielectric layer as a mask, and removing the first sacrificial layer and the second dielectric layer to form the cellular pattern with the remaining first dielectric layer and MTJ mask layer; and

removing the first dielectric layer, transferring the cellular pattern to the MTJ layer by taking the MTJ mask layer as a mask, and partially removing the MTJ mask layer in a vertical direction to obtain the cellular MTJ array.

9. The method according to claim 3 , wherein transferring the first pattern to the MTJ structure comprises:

transferring the first pattern to the MTJ mask layer and the MTJ layer by taking the first dielectric layer as a mask.

10. The method according to claim 9 , wherein before forming the second mask structure on the MTJ structure, the method further comprises:

forming, on the substrate, a second sacrificial layer covering the MTJ layer, the MTJ mask layer and the first dielectric layer.

11. The method according to claim 10 , wherein the second mask structure comprises a second photoresist layer and a third dielectric layer; and

wherein performing a patterning process on the second mask structure to form the second pattern extending in the second direction comprises:

forming the second photoresist layer on the second sacrificial layer and the first dielectric layer;

performing an etching process on the second photoresist layer in the second direction to form a patterned second photoresist layer;

forming, on the second sacrificial layer, the third dielectric layer covering the second photoresist layer, third trenches arranged at intervals with the second photoresist layer being provided on a surface of the third dielectric layer;

removing the third dielectric layer located on a plane of top of the second photoresist layer and located below the third trenches; and

removing the second photoresist layer to form the second pattern extending in the second direction.

12. The method according to claim 11 , wherein performing a patterning process on the MTJ structure by utilizing the second pattern to form the cellular MTJ array comprises:

patterning the first dielectric layer, the second sacrificial layer and the MTJ structure by taking the third dielectric layer as a mask, and removing the second sacrificial layer and the third dielectric layer to form the cellular pattern with the remaining first dielectric layer and MTJ structure; and

removing the first dielectric layer to obtain the cellular MTJ array.

13. The method according to claim 11 , wherein a height ratio of the MTJ layer to the MTJ mask layer ranges from 0.5:1 to 1.5:1.

14. The method according to claim 1 , wherein after the forming the cellular MTJ array, the method further comprises:

forming, on the substrate, an insulating layer covering the cellular MTJ array.

15. The method according to claim 1 , wherein an included angle between the first direction and the second direction is 60 degrees, and the cellular pattern is a hexagonal pattern.

16. A semiconductor structure manufactured by the method of claim 1 , comprising:

a substrate; and

a cellular magnetic tunnel junction (MTJ) array formed on the substrate, wherein the cellular MTJ array is arranged in a cellular pattern, and the cellular pattern comprises a first pattern extending in a first direction and a second pattern extending in a second direction, and the first direction intersects the second direction, and is not perpendicular to the second direction;

wherein

the second pattern extending in the second direction is formed by forming a second mask structure on the MTJ structure and performing a patterning process on the second mask structure; and

the cellular MTJ array arranged in the cellular pattern is formed by performing a patterning process on the MTJ structure by utilizing the second pattern.

17. The semiconductor structure according to claim 16 , further comprising

an insulating layer, wherein the insulating layer is formed on the substrate, and covers the cellular MTJ array.

18. The semiconductor structure according to claim 16 , wherein

the cellular MTJ array comprises an MTJ layer and an MTJ mask layer, wherein the MTJ layer is formed on the substrate, and the MTJ mask layer is formed on the MTJ layer.

19. The semiconductor structure according to claim 16 , wherein

an included angle between the first direction and the second direction is 60 degrees, and the cellular pattern is a hexagonal pattern.

20. A semiconductor memory, comprising:

the semiconductor structure according to claim 16 .

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 4, 2022
From: ZENG, DINGGUI
To: CHANGXIN MEMORY TECHNOLOGIES, INC.; BEIJING SUPERSTRING ACADEMY OF MEMORY TECHNOLOGY
Reel/Frame 060394/0512 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 1, 2022
From: DENG, JIEFANG; LI, HUIHUI; WANG, XIAOGUANG; ZENG, DINGGUI; CAO, KANYU
To: CHANGXIN MEMORY TECHNOLOGIES, INC.; BEIJING SUPERSTRING ACADEMY OF MEMORY TECHNOLOGY
Reel/Frame 060076/0457 →
Priority Claims (1)
CN 202111009872.0 · Aug 31, 2021 · national
Continuity (2)
Continuation PCTCN2022077704 · Feb 24, 2022
Related Publication 20230061322A1 · Mar 2, 2023
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