IP Library Granted Patent US 12,235,708
Granted Patent B2
US 12,235,708 · App. 17/483,702 · Granted Feb 25, 2025

Device and method for two-stage transitioning between reduced power states

Inventors: Benjamin Tsien (Santa Clara, CA); Alexander J. Branover (Boxborough, MA); Indrani Paul (Austin, TX); Christopher T. Weaver (Boxborough, MA); Thomas J. Gibney (Boxborough, MA); Stephen V. Kosonocky (Fort Collins, CO); John P. Petry (San Diego, CA); Mihir Shaileshbhai Doctor (Santa Clara, CA)
Assignee: Advanced Micro Devices, Inc.
G06F1/3234
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Quick Facts
Patent No.
US 12,235,708
App. No.
17/483,702
Granted
Feb 25, 2025
Kind
B2
Abstract

Devices and methods for cache prefetching are provided. A device is provided which comprises a quality of service (QOS) component having first assigned registers used to store data to execute a program, a plurality of non-QOS components having second assigned registers used to store data to execute the program and a power management controller, in communication with the QOS component and the non-QOS components. The power management controller is configured to issue fences for the non-QOS components when it is determined that one or more of the non-QOS components are idle, issue a fence for the QOS component when the fences for the non-QOS components are completed and enter a reduced power state when the fences for the non-QOS components and the fence for the QOS component are completed.

Claims (55)

1. A processing device comprising:

a quality of service (QOS) component that has at least one QOS constraint;

a plurality of non-QOS components that do not have the at least one QOS constraint; and

a power management controller, in communication with the QOS component and the non-QOS components, and configured to:

issue fences for one or more non-QOS components among the plurality of the non-QOS components when it is determined that the one or more of the non-QOS components are idle;

issue a fence for the QOS component when the fences for the one or more non-QOS components are completed; and

enter a reduced power state when the fence for the QOS component is completed.

2. The processing device of claim 1 , further comprising a data fabric that includes

non-QOS servicing logic configured to service the plurality of non-QOS components, wherein the one or more non-QOS components includes the non-QOS servicing logic; and

QOS servicing logic configured to service the QOS component,

wherein the power management controller is further configured to:

send fence requests to the one or more non-QOS components,

issue the fences for the one or more non-QOS components when acknowledgements of the fence requests to the one or more non-QOS components are received; and

send a fence requests to the QOS servicing logic when the fences for the one or more non-QOS components are completed.

3. The processing device of claim 2 , wherein the power management controller is configured to:

determine whether or not one or more of the QOS component, the QOS servicing logic, or the non-QOS components are no longer idle prior to receiving the acknowledgements from the QOS component;

when it is determined that one or more of the QOS component, the QOS servicing logic, or non-QOS components are no longer idle prior to receiving the acknowledgements from the QOS component and the QOS servicing logic, abort entry into the reduced power state; and

when it is determined that one or more of the QOS component, the QOS servicing logic, or the one or more non-QOS components are no longer idle after receiving the acknowledgements from the QOS component and the QOS servicing logic, enter the reduced power state.

4. The processing device of claim 1 , wherein the power management controller is configured to determine that one or more of the QOS component or the non-QOS components are no longer idle by receive an indication of a wake event from another component which is not powered off.

5. The processing device of claim 1 , wherein the power management controller is configured to execute a process of restoring power to the QOS component when the one or more non-QOS components are indicated to be active.

6. The processing device of claim 1 , wherein the QOS component is a plurality of QOS components, and

the power management controller is further configured to issue fences to the plurality of QOS components when it is determined that the plurality of non-QOS components are idle.

7. The processing device of claim 1 , further comprising a display, wherein the QOS component is a display controller configured to provide data to a display buffer for the display.

8. The processing device of claim 1 , wherein the reduced power state is a state in which power is removed from the one or more non-QOS components and the QOS component.

9. The processing device of claim 1 , wherein the reduced power state is a second reduced power state in which power is removed from the one or more non-QOS components and the QOS component and the power management controller is configured to transition back and forth between a first reduced power state, in which power is removed from the one or more non-QOS components and which supports a display stutter mode, and the second reduced power state.

10. A method of power state transitioning comprising:

issuing fences for one or more non-QOS components among a plurality of non-QOS components when it is determined that the one or more non-QOS components are idle;

issuing a fence for a QOS component when the fences for the one or more non-QOS components are completed, wherein the QOS component has at least one QOS constraint and the plurality of non-QOS components do not have the at least one QOS constraint; and

entering a reduced power state of a processing device when the fence for the QOS component is completed.

11. The method of claim 10 , further comprising:

sending fence requests to the one or more non-QOS components, wherein the one or more non-QOS components includes a non-QOS servicing logic of a data fabric;

issuing the fences for the one or more non-QOS components, when acknowledgements of the fence requests to the one or more non-QOS components are received; and

sending fence requests to the QOS component and to QOS servicing logic, when the fences for the non-QOS components are completed.

12. The method of claim 11 , further comprising:

determining whether or not one or more of the QOS component, the non-QOS servicing logic, or the one or more non-QOS components are no longer idle prior to receiving the acknowledgements from the QOS component;

when it is determined that one or more of the QOS component, the non-QOS servicing logic, or the one or more non-QOS components are no longer idle prior to receiving the acknowledgements from the QOS component and the non-QOS servicing logic, aborting entry into the reduced power state; and

when it is determined that one or more of the QOS components, the non-QOS servicing logic, or the one or more non-QOS components are no longer idle after receiving the acknowledgements from the QOS component and the non-QOS servicing logic, entering the reduced power state.

13. The method of claim 12 , further comprising determining that one or more of the QOS component or the one or more non-QOS components are no longer idle by receive an indication of a wake event from another component which is not powered off.

14. The method of claim 10 , further comprising executing a process of restoring power to the QOS component when the one or more non-QOS components are indicated to be active.

15. The method of claim 10 , wherein the QOS component is a plurality of QOS components, and the method further comprises:

issuing fences to a plurality of QOS components when it is determined that the one or more non-QOS components are idle.

16. The method of claim 10 , wherein the reduced power state is a state in which power is removed from the one or more non-QOS components and the QOS component.

17. The method of claim 10 , wherein the reduced power state is a second reduced power state in which power is removed from the one or more non-QOS components and the QOS component and transitions back and forth between a first reduced power state, in which power is removed from the one or more non-QOS components and which supports a display stutter mode, and the second reduced power state.

18. A non-transitory computer readable medium comprising instructions for power state transitioning a processing device, the instructions when executed by the processing device cause the processing device to execute a method comprising:

issuing fences for one or more non-QOS components among a plurality of non-QOS components when it is determined that the one or more non-QOS components are idle;

issuing a fence for a QOS component when the fences for the one or more non-QOS components are completed, wherein the QOS component has at least one QOS constraint and the plurality of non-QOS components do not have the at least one QOS constraint; and

entering a reduced power state of a processing device when the fence for the QOS component is completed.

19. The non-transitory computer readable medium of claim 18 , wherein the method further comprise:

sending fence requests to the one or more non-QOS components, wherein the one or more non-QOS components includes a non-QOS servicing logic of a data fabric;

issuing the fences for the one or more non-QOS components, when acknowledgements of the fence requests to the one or more non-QOS components are received; and

sending fence requests to the QOS component and to QOS servicing logic, when the fences for the one or more non-QOS components are completed.

20. The non-transitory computer readable medium of claim 19 , wherein the method further comprises:

determining whether or not one or more of the QOS component, the non-QOS servicing logic, or the one or more non-QOS components are no longer idle prior to receiving the acknowledgements from the QOS component;

when it is determined that one or more of the QOS component, the non-QOS servicing logic, or the one or more non-QOS components are no longer idle prior to receiving the acknowledgements from the QOS component and the non-QOS servicing logic, aborting entry into the reduced power state; and

when it is determined that one or more of the QOS components, the non-QOS servicing logic, or the one or more non-QOS components are no longer idle after receiving the acknowledgements from the QOS component and the non-QOS servicing logic, entering the reduced power state.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 3, 2022
From: TSIEN, BENJAMIN; BRANOVER, ALEXANDER J.; PAUL, INDRANI; WEAVER, CHRISTOPHER T.; GIBNEY, THOMAS J.; KOSONOCKY, STEPHEN V.; PETRY, JOHN P.; DOCTOR, MIHIR SHAILESHBHAI
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 059160/0215 →
Continuity (1)
Related Publication 20230090567A1 · Mar 23, 2023
References Cited (8)
US 8543826B1 · Hutchison et al. · 2013 [cited by applicant]
US 20110268000A1 · Kashikar et al. · 2011 [cited by applicant]
US 20130055000A1 · Lee · 2013 [cited by examiner]
US 20150127968A1 · Chi et al. · 2015 [cited by applicant]
US 20170093746A1 · Gahlot et al. · 2017 [cited by applicant]
US 20170153902A1 · Lin · 2017 [cited by examiner]
US 20190108861A1 · Tsien · 2019 [cited by examiner]
KR 102042495B1 · 2019 [cited by applicant]