Granted Patent B2

US 12,236,250 · App. 17/581,766 · Granted Feb 25, 2025

Inventor: Caroline D. Kahn (San Jose, CA)

Assignee: Samsung Electronics Co., Ltd.

G06F9/44589G06F9/44505G06F9/44578G06F11/3457

Abstract

Claims (54)

1. A method for checking program code having a program instruction, the method comprising:

in response to a first command from a host computing device in communication with a computational storage device of a computing system to load the program code, executing by the host computing device a first check of the program code loaded into the computing system for execution, wherein the first check includes making a determination about availability of memory configuration data for the program instruction, wherein the memory configuration data is for configuring a memory for executing the program code;

identifying, based on the determination about the availability of the memory configuration data, metadata for accessing the memory by the program instruction; and

storing the metadata in a first data structure in the memory;

in response to a program execute command from the host computing device to execute the program code, running, by the computational storage device in an execution mode of the program code, a second check of the program code, wherein the running of the second check includes:

identifying the memory configuration data in the memory;

retrieving the metadata by accessing the memory from the first data structure;

determining validity of access to the memory by the program instruction based on the memory configuration data and the metadata;

building a second data structure in the memory; and

storing a result of the second check in the second data structure in the memory; and

executing by the computing system the program code based on the stored result of the second check determining the validity of access to the memory.

2. The method of claim 1 further comprising:

running a third check of the program code;

retrieving the result in response to running the third check; and

executing the program code.

3. The method of claim 2 , wherein the third check is in response to executing the program code, wherein the result is retrieved from the second data structure in response to the third check.

4. The method of claim 1 , wherein the program code is generated in a user space of a processing device of the computing system, and executed in a kernelspace of the processing device.

5. The method of claim 1 , wherein the first check and the second check are performed by the computational storage device.

6. The method of claim 1 , wherein the metadata for accessing the memory is retrieved from the program code.

7. A method for checking program code having a program instruction, the method comprising:

running by a computing system, in an execution environment satisfying a criterion, a simulation of checks of the program code loaded into the computing system for execution by a processing device, wherein the running of the simulation includes, in a simulation mode:

running a first check including making a first determination about availability of memory configuration data for the program instruction;

identifying metadata for accessing the memory by the program instruction;

storing the metadata in a first data structure in a memory;

identifying a trigger for executing the program code; and

based on identifying the trigger, running, in an execution mode of the program code, a second check of the program code based on the memory configuration data and the metadata stored in the first data structure, the second check checking for validity of access to the memory by the program instruction;

building a second data structure in the memory;

storing a result of the second check of the simulation in the second data structure in the memory;

executing, by the computing system, the checks of the program code outside of the simulation, wherein the executing of the checks of the program code outside of the simulation includes checking for validity of access to the memory by the program instruction outside of the simulation mode;

making, by the computing system, a second determination about the checks of the program code outside of the simulation in the execution mode of the program code;

retrieving, by the computing system, the result stored in the second data structure in the memory based on the second determination; and

executing, by the computing system, the program code based on the result stored in the second data structure.

8. The method of claim 7 , wherein the executing of the check is in response to a command to execute the program code.

9. The method of claim 7 , wherein the determination is a determination that the memory configuration data is needed for making the check.

10. The method of claim 9 , wherein the result is stored in association with the configuration data.

11. The method of claim 7 , wherein in running the simulation, a determination is made that the memory configuration data is needed for the check, the method further comprising:

selecting the memory configuration data; and

running the simulation of the check based on the memory configuration data.

12. A system for checking program code having a program instruction, the system comprising:

one or more processors; and

one or more memory devices, wherein the one or more memory devices store instructions that, when executed by respectively the one or more processors, cause the one or more processors to respectively:

in response to a first command from a host computing device in communication with a computational storage device of a computing system to load the program code, execute by the host computing device a first check of the program code loaded into the computing system for execution, wherein the first check includes instructions that cause the one or more processors to make a determination about availability of memory configuration data for the program instruction, wherein the memory configuration data is for configuring one of the one or more memory devices for executing the program code;

identify based on the determination about the availability of the memory configuration data, metadata for accessing the one of the one or more memory devices by the program instruction; and

store the metadata in a first data structure in the one or more memory devices;

in response to a program execute command from the host computing device to execute the program code, run, by the computational storage device in an execution mode of the program code, a second check of the program code, wherein the second check include instructions that cause the one or more processors to:

identify the memory configuration data in the one or more memory devices;

retrieve the metadata by accessing the one of the one or more memory devices from the first data structure;

determine validity of access to the one of the one or more memory devices by the program instruction based on the memory configuration data and the metadata;

build a second data structure in the one or more memory devices; and

store a result of the second check in the second data structure in the one or more memory devices; and

execute by the computing system the program code based on the stored result of the second check determining the validity of access to the one or more memory devices.

13. The system of claim 12 , wherein the one or more processors and the one or more memory devices are included in the computational storage device.

14. The system of claim 12 , wherein the first check is performed by a first one of the one or more processors in the host computing device, and the second check is performed by a second one of the one or more processors in the computational storage device in communication with the host computing device.

15. The system of claim 12 , wherein the metadata for accessing the one of the one or more memory devices is retrieved from the program code.

Assignments (1)

Continuity (2)

References Cited (32)