IP Library › Granted Patent US 12,238,863
Granted Patent B2
US 12,238,863 · App. 18/067,859 · Granted Feb 25, 2025

Electronic device and method for forming the same

Inventors: Cheng-Chi Wang (Miao-Li County, TW); Kuan-Feng Lee (Miao-Li County, TW); Jui-Jen Yueh (Miao-Li County, TW)
Assignee: INNOLUX CORPORATION
H05K1/115H05K1/0271H05K1/0274H05K3/4038H05K2201/096H05K2201/09827
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Quick Facts
Patent No.
US 12,238,863
App. No.
18/067,859
Granted
Feb 25, 2025
Kind
B2
Abstract

An electronic device is provided. The electronic device includes a substrate structure, a control unit, a first circuit structure, and an electronic unit. The substrate structure has a conductive via pattern and a dummy via pattern. The control unit is electrically connected to the conductive via pattern. The first circuit structure is electrically connected to the conductive via pattern. The electronic unit is electrically connected to the control unit through the first circuit structure. The dummy via pattern is electrically insulated from the first circuit structure.

Claims (40)

1. An electronic device, comprising:

a substrate structure having a conductive via pattern and a dummy via pattern;

a control unit electrically connected to the conductive via pattern;

a first circuit structure electrically connected to the conductive via pattern; and

an electronic unit electrically connected to the control unit through the first circuit structure,

wherein the dummy via pattern is electrically insulated from the first circuit structure.

2. The electronic device as claimed in claim 1 , wherein the conductive via pattern comprises:

a first conductive via electrically connected to the control unit through the first circuit structure; and

a second conductive via electrically connected to the electronic unit through a portion of the first circuit structure separated from the control unit.

3. The electronic device as claimed in claim 1 , further comprising:

a second circuit structure disposed on the substrate structure and opposite to the first circuit structure,

wherein the dummy via pattern is electrically insulated from the second circuit structure.

4. The electronic device as claimed in claim 3 , wherein the first circuit structure and the second circuit structure are electrically connected through the conductive via pattern.

5. The electronic device as claimed in claim 1 , further comprising:

a stress adjustment layer disposed on the substrate structure and located on a side of the substrate structure opposite from the control unit,

wherein the stress adjustment layer covers a bottom surface of the dummy via pattern.

6. The electronic device as claimed in claim 1 , wherein the control unit is located above the substrate structure, and the control unit is located between the substrate structure and the first circuit structure.

7. The electronic device as claimed in claim 1 , wherein the control unit is located below the substrate structure, and the substrate structure is located between the control unit and the first circuit structure.

8. The electronic device as claimed in claim 1 , further comprising a protection layer surrounding the electronic unit.

9. The electronic device as claimed in claim 1 , wherein the substrate structure comprises a transparent material.

10. The electronic device as claimed in claim 1 , wherein the conductive via pattern and the dummy via pattern comprise a same material.

11. The electronic device as claimed in claim 1 , further comprising:

an alignment component disposed on the first circuit structure and electrically connected to the electronic unit,

wherein the alignment component has a cavity facing the electronic unit.

12. The electronic device as claimed in claim 1 , further comprising:

a buffer layer disposed between the substrate structure and the control unit,

wherein the buffer layer covers a top surface of the dummy via pattern.

13. The electronic device as claimed in claim 12 , wherein the first circuit structure penetrates through the buffer layer to be electrically connected to the conductive via pattern.

14. A method for forming an electronic device, comprising:

forming a substrate structure having a conductive via pattern and a dummy via pattern;

forming a control unit electrically connected to the conductive via pattern;

forming a first circuit structure electrically connected to the conductive via pattern; and

disposing an electronic unit on the first circuit structure, wherein the electronic unit is electrically connected to the control unit through the first circuit structure,

wherein the dummy via pattern is electrically insulated from the first circuit structure.

15. The method for forming an electronic device as claimed in claim 14 , further comprising forming a second circuit structure opposite to the first circuit structure on the substrate structure, wherein the dummy via pattern is electrically insulated from the second circuit structure.

16. The method for forming an electronic device as claimed in claim 14 , wherein the conductive via pattern and the dummy via pattern are formed simultaneously in a deposition process.

17. The method for forming an electronic device as claimed in claim 14 , further comprising forming a buffer layer covering a top surface of the dummy via pattern before forming the control unit.

18. The method for forming an electronic device as claimed in claim 17 , further comprising forming a stress adjustment layer on a side of the substrate structure opposite to the buffer layer, wherein a thickness of the stress adjustment layer is greater than a thickness of the buffer layer.

19. The method for forming an electronic device as claimed in claim 14 , further comprising forming a protection layer surrounding the electronic unit, wherein the control unit is formed after forming the electronic unit and the protection layer.

20. The method for forming an electronic device as claimed in claim 19 , wherein the substrate structure is located between the electronic unit and the control unit.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 19, 2022
From: WANG, CHENG-CHI; LEE, KUAN-FENG; YUEH, JUI-JEN
To: INNOLUX CORPORATION
Reel/Frame 062168/0241 →
Priority Claims (1)
CN 202211473825.6 · Nov 22, 2022 · national
Continuity (1)
Related Publication 20240172361A1 · May 23, 2024
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