IP Library › Granted Patent US 12,238,957
Granted Patent B2
US 12,238,957 · App. 17/329,938 · Granted Feb 25, 2025

Display apparatus

Inventors: Wonho Jang (Yongin-si, KR); Sun Park (Yongin-si, KR); Donghyun Won (Yongin-si, KR)
Assignee: SAMSUNG DISPLAY CO., LTD.
H10K50/844H10K59/122
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,238,957
App. No.
17/329,938
Granted
Feb 25, 2025
Kind
B2
Abstract

A display apparatus includes a substrate including a display area and a peripheral area, a thin film transistor including a semiconductor layer, a gate electrode, a source electrode, and a drain electrode, a first inorganic insulating layer located on the substrate and under the gate electrode and covering the semiconductor layer, a second inorganic insulating layer located on the first inorganic insulating layer and covering the gate electrode, a third inorganic insulating layer located on the second inorganic insulating layer and including a 1-3th opening in the peripheral area, an organic insulating layer located on the third inorganic insulating layer, covering the source electrode and the drain electrode, and including a second opening overlapping the 1-3th opening in the peripheral area, and a pattern portion located on a layer under the organic insulating layer and overlapping the 1-3th opening and the second opening.

Claims (61)

1. A display apparatus comprising:

a substrate including a display area and a peripheral area adjacent to the display area;

a thin film transistor arranged in the display area and including a semiconductor layer, a gate electrode, a source electrode, and a drain electrode;

a first inorganic insulating layer located on the substrate and under the gate electrode and covering the semiconductor layer;

a second inorganic insulating layer located on the first inorganic insulating layer and covering the gate electrode;

a third inorganic insulating layer located on the second inorganic insulating layer and including a third inorganic insulating layer opening in the peripheral area;

an organic insulating layer located on the third inorganic insulating layer, covering the source electrode and the drain electrode, and including a second opening overlapping the third inorganic insulating layer opening in the peripheral area; and

a pattern portion located on a layer under the organic insulating layer and overlapping the third inorganic insulating layer opening and the second opening, wherein

the third inorganic insulating layer opening is not filled with an organic material,

the pattern portion overlaps the first inorganic insulating layer and/or the second inorganic insulating layer between the substrate and the third inorganic insulating layer opening of the third inorganic insulating layer, and

respective portions of the first inorganic insulating layer and/or the second inorganic insulating layer overlapping the patterned portion have an overlapping portion including a top surface elevated above a top surface of a non-overlapping portion by a height as high as a height of the pattern portion.

2. The display apparatus of claim 1 , wherein

the pattern portion includes a first pattern layer arranged on the substrate, and

the display apparatus comprises a buffer layer located between the substrate and the first inorganic insulating layer and covering the first pattern layer in the peripheral area.

3. The display apparatus of claim 2 , wherein the semiconductor layer is located on the buffer layer.

4. The display apparatus of claim 1 , wherein

the pattern portion includes a second pattern layer, and

the second pattern layer and the gate electrode are arranged on a same layer.

5. The display apparatus of claim 4 , wherein the second pattern layer and the gate electrode include a same material.

6. The display apparatus of claim 1 , wherein

the pattern portion includes a third pattern layer, and

the third pattern layer, the source electrode, and the drain electrode are located on a same layer.

7. The display apparatus of claim 6 , wherein the third pattern layer, the source electrode, and the drain electrode include a same material.

8. The display apparatus of claim 1 , further comprising:

a pixel electrode electrically connected to the thin film transistor in the display area and located on the organic insulating layer; and

a pixel definition layer located on the organic insulating layer over the display area and the peripheral area,

wherein the pixel definition includes a third opening overlapping the third inorganic insulating layer opening and the second opening in the peripheral area.

9. A display apparatus comprising:

a substrate including a display area and a peripheral area adjacent to the display area;

at least one inorganic insulating layer on the substrate;

an organic insulating layer on the at least one inorganic insulating layer;

an opening portion located in the peripheral area and including:

a first opening in the at least one inorganic insulating layer; and

a second opening in the organic insulating layer; and

a pattern portion located in the peripheral area and overlapping the opening portion,

wherein in a layer exposed by the opening portion, a distance from an upper surface of a portion overlapping the opening portion to an upper surface of the substrate is greater than a distance from an upper surface of the portion not overlapping the opening portion to an upper surface of the substrate, wherein

the first opening in the at least one inorganic insulating layer is not filled with an organic material,

the pattern portion overlaps at least one inorganic insulating layer between the substrate and the opening, and

a portion of the at least one inorganic insulating layer overlapping the pattern portion has an overlapping portion including a top surface elevated above a top surface of a non-over-lapping portion by a height as high as the pattern portion.

10. The display apparatus of claim 9 , wherein the at least one inorganic insulating layer includes at least one of:

a first inorganic insulating layer on the substrate;

a second inorganic insulating layer on the first inorganic insulating layer; and

a third inorganic insulating layer on the second inorganic insulating layer,

wherein the first opening includes at least one of:

a first inorganic insulating layer opening in the first inorganic insulating layer;

a second inorganic insulating layer opening in the second inorganic insulating layer; and

a third inorganic insulating layer opening in the third inorganic insulating layer.

11. The display apparatus of claim 10 , wherein the layer exposed by the opening portion is the first inorganic insulating layer, the second inorganic insulating layer or the third inorganic insulating layer.

12. The display apparatus of claim 10 , further comprising:

a thin film transistor located in the display area and including a semiconductor layer, a gate electrode, a source electrode, and a drain electrode, wherein

the first inorganic insulating layer covers the semiconductor layer, the second inorganic insulating layer covers the gate electrode, and the third inorganic insulating layer covers the source electrode and the drain electrode.

13. The display apparatus of claim 10 , wherein the pattern portion includes at least one of:

a first pattern layer on the substrate;

a second pattern layer on the first inorganic insulating layer; and

a third pattern layer on the second inorganic insulating layer.

14. The display apparatus of claim 13 , further comprising:

a thin film transistor located in the display area and including a semiconductor layer, a gate electrode, a source electrode, and a drain electrode, wherein

the second pattern layer and the gate electrode include a same material, and

the third pattern layer, the source electrode, and the drain electrode include a same material.

15. The display apparatus of claim 9 , further comprising a pixel electrode on the organic insulating layer, wherein

there is no residual film including a same material as the pixel electrode on the layer exposed by the opening portion.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 25, 2021
From: JANG, WONHO; PARK, SUN; WON, DONGHYUN
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 056391/0966 →
Priority Claims (1)
KR 10-2020-0097539 · Aug 4, 2020 · national
Continuity (1)
Related Publication 20220045301A1 · Feb 10, 2022
References Cited (11)
US 6951818B2 · Decre et al. · 2005 [cited by applicant]
US 8334545B2 · Levermore et al. · 2012 [cited by applicant]
US 9070600B2 · Katsui et al. · 2015 [cited by applicant]
US 20070002222A1 · Lim et al. · 2007 [cited by applicant]
US 20200083475A1 · Kang · 2020 [cited by examiner]
US 20200119304A1 · Choi · 2020 [cited by examiner]
US 20210143365A1 · Jo · 2021 [cited by examiner]
CN 109616510 · 2019 [cited by applicant]
JP 4672238 · 2011 [cited by applicant]
KR 101201310 · 2012 [cited by applicant]
KR 101486180 · 2015 [cited by applicant]