IP Library › Granted Patent US 12,243,828
Granted Patent B2
US 12,243,828 · App. 17/355,770 · Granted Mar 4, 2025

Microelectronic assemblies having topside power delivery structures

Inventors: Bernd Waidhas (Pettendorf, DE); Carlton Hanna (Santa Jose, CA); Stephen Morein (San Jose, CA); Lizabeth Keser (San Diego, CA); Georg Seidemann (Landshut, DE)
Assignee: Intel Corporation
H01L23/5389H01L23/3675H01L23/481H01L24/24H01L24/96H01L24/97H01L25/0652H01L25/16H01L25/18H01L25/50H05K1/181H01L24/05H01L24/06H01L24/08H01L2224/0557H01L2224/06181H01L2224/08225H01L2224/24137H01L2924/19041H01L2924/19042H01L2924/19106
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,243,828
App. No.
17/355,770
Granted
Mar 4, 2025
Kind
B2
Abstract

Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a package substrate including a first conductive pathway electrically coupled to a power source; a mold material on the package substrate including a first microelectronic component embedded in the mold material, a second microelectronic component embedded in the mold material, and a TMV, between the first and second microelectronic components, the TMV electrically coupled to the first conductive pathway; a redistribution layer (RDL) on the mold material including a second conductive pathway electrically coupled to the TMV; and a third microelectronic component on the RDL and electrically coupled to the second conductive pathway, wherein the second conductive pathway electrically couples the TMV, the first microelectronic component, and the third microelectronic component.

Claims (44)

1. A microelectronic assembly, comprising:

a package substrate, having a surface, including a first conductive pathway electrically coupled to a power source;

a mold material on the surface of the package substrate including a first microelectronic component, having a first surface and an opposing second surface, embedded in the mold material, a second microelectronic component embedded in the mold material, and a through-mold via (TMV), between the first and second microelectronic components, the TMV electrically coupled to the first conductive pathway;

a redistribution layer (RDL), having a first surface on the mold material and an opposing second surface, including a second conductive pathway electrically coupled to the TMV; and

a third microelectronic component at the second surface of the RDL and electrically coupled to the second conductive pathway, wherein the second conductive pathway electrically couples the TMV, the third microelectronic component, and the second surface of the first microelectronic component.

2. The microelectronic assembly of claim 1 , further comprising:

a fourth microelectronic component at the second surface of the RDL and electrically coupled to the second conductive pathway.

3. The microelectronic assembly of claim 1 , wherein the surface of the package substrate is a second surface and the package substrate further includes an opposing first surface, and further comprising:

a circuit board electrically coupled to the first surface of the package substrate, wherein the power source is on the circuit board.

4. The microelectronic assembly of claim 3 , further comprising:

a capacitive element at the first surface of the package substrate and electrically coupled to the first conductive pathway.

5. The microelectronic assembly of claim 1 , wherein the first microelectronic component is a central processing unit, a graphics processing unit, a digital signal processor, an application specific integrated circuit, a server processor, or a crypto processor.

6. The microelectronic assembly of claim 1 , wherein the third microelectronic component is a voltage regulator.

7. The microelectronic assembly of claim 2 , wherein the fourth microelectronic component is an inductor.

8. The microelectronic assembly of claim 1 , further comprising:

a heat transfer structure at the second surface of the RDL.

9. A microelectronic assembly, comprising:

a circuit board including a power source;

a package substrate, having a first surface and an opposing second surface, on the circuit board and including a first conductive pathway electrically coupled to the power source;

a first microelectronic component, having a first surface and an opposing second surface, embedded in a mold material on the second surface of the package substrate;

a second microelectronic component embedded in the mold material;

a through-mold via (TMV), between the first and second microelectronic components, extending through the mold material and electrically coupled to the first conductive pathway;

a redistribution layer (RDL), having a first surface and an opposing second surface, on the mold material with the first surface facing the mold material, including a second conductive pathway electrically coupled to the TMV; and

a third microelectronic component at the second surface of the RDL and electrically coupled to the second conductive pathway, wherein the second conductive pathway electrically couples the TMV, the third microelectronic component, and the second surface of the first microelectronic component.

10. The microelectronic assembly of claim 9 , further comprising:

a fourth microelectronic component at the second surface of the RDL and electrically coupled to the second conductive pathway.

11. The microelectronic assembly of claim 9 , wherein the first microelectronic component is a central processing unit, a graphics processing unit, a digital signal processor, an application specific integrated circuit, a server processor, or a crypto processor.

12. The microelectronic assembly of claim 9 , wherein the third microelectronic component is a voltage regulator.

13. The microelectronic assembly of claim 10 , wherein the fourth microelectronic component is an inductor.

14. The microelectronic assembly of claim 9 , further comprising:

a heat transfer structure at the second surface of the RDL.

15. The microelectronic assembly of claim 9 , wherein the mold material includes an organic material.

16. A microelectronic assembly, comprising:

a package substrate, having a surface, including a first conductive pathway electrically coupled to a power source;

a first microelectronic component, having a first surface and an opposing second surface, embedded in a mold material on the second surface of the package substrate;

a through-mold via (TMV), adjacent to the first microelectronic component, extending through the mold material and electrically coupled to the first conductive pathway;

a redistribution layer (RDL), having a first surface and an opposing second surface, on the mold material with the first surface facing the mold material, including a second conductive pathway electrically coupled to the TMV;

a second microelectronic component at the second surface of the RDL and electrically coupled to the second conductive pathway, wherein the second conductive pathway electrically couples the TMV, the second microelectronic component, and the second surface of the first microelectronic component; and

a third microelectronic component at the second surface of the RDL and electrically coupled to the second conductive pathway.

17. The microelectronic assembly of claim 16 , wherein the first microelectronic component is a central processing unit, a graphics processing unit, a digital signal processor, an application specific integrated circuit, a server processor, or a crypto processor.

18. The microelectronic assembly of claim 16 , wherein the second microelectronic component is a voltage regulator.

19. The microelectronic assembly of claim 16 , wherein the third microelectronic component is an inductor.

20. The microelectronic assembly of claim 16 , wherein the surface of the package substrate is a second surface and the package substrate further includes an opposing first surface, and further comprising:

a circuit board electrically coupled to the first surface of the package substrate, wherein the power source is on the circuit board.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE THE SPELLING OF THE 4TH INVENTOR FIRST NAME PREVIOUSLY RECORDED AT REEL: 56866 FRAME: 617. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Oct 18, 2024
From: WAIDHAS, BERND; HANNA, CARLTON; MOREIN, STEPHEN; KESER, LIZABETH; SEIDEMANN, GEORG
To: INTEL CORPORATION
Reel/Frame 069207/0283 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2021
From: WAIDHAS, BERND; HANNA, CARLTON; MOREIN, STEPHEN; KESER, LIZBETH; SEIDEMANN, GEORG
To: INTEL CORPORATION
Reel/Frame 056866/0617 →
Continuity (1)
Related Publication 20220415815A1 · Dec 29, 2022
References Cited (26)
US 5574630A · Kresge · 1996 [cited by examiner]
US 6873529B2 · Ikuta · 2005 [cited by examiner]
US 6961245B2 · Ikuta · 2005 [cited by examiner]
US 7173842B2 · Isenberger · 2007 [cited by examiner]
US 7245507B2 · DiBene et al. · 2007 [cited by applicant]
US 7279795B2 · Periaman et al. · 2007 [cited by applicant]
US 7517787B2 · Agraharam · 2009 [cited by examiner]
US 7786591B2 · Khan et al. · 2010 [cited by applicant]
US 8089777B2 · Negishi · 2012 [cited by examiner]
US 8294252B1 · Patel · 2012 [cited by applicant]
US 8363402B2 · Brunschwiler · 2013 [cited by examiner]
US 8890628B2 · Nair · 2014 [cited by examiner]
US 10236209B2 · Sharan et al. · 2019 [cited by applicant]
US 10950550B2 · Qian et al. · 2021 [cited by applicant]
US 20040188813A1 · Agraharam · 2004 [cited by examiner]
US 20140110788A1 · Cho et al. · 2014 [cited by applicant]
US 20140225248A1 · Henderson et al. · 2014 [cited by applicant]
US 20160358848A1 · Meyer · 2016 [cited by examiner]
US 20170284636A1 · Dittes · 2017 [cited by examiner]
US 20180286815A1 · Qi · 2018 [cited by examiner]
US 20190333876A1 · Yudanov · 2019 [cited by applicant]
US 20200043891A1 · Yu et al. · 2020 [cited by applicant]
US 20200321275A1 · Haba et al. · 2020 [cited by applicant]
US 20210005592A1 · Lee et al. · 2021 [cited by applicant]
US 20210111147A1 · Liff · 2021 [cited by examiner]
US 20210208649A1 · Ji et al. · 2021 [cited by applicant]