Granted Patent B2

US 12,244,709 · App. 16/550,598 · Granted Mar 4, 2025

Inventors: Jaekyu Lee (Austin, TX); Yasuo Ishii (Austin, TX); Dam Sunwoo (Austin, TX)

Assignee: Arm Limited

H04L9/0891

Abstract

Claims (36)

1. A data processing apparatus comprising:

storage circuitry;

communication circuitry to respond to a retrieve request comprising a requested index with a retrieve response comprising requested data;

coding circuitry to perform a coding operation using a current key, wherein the current key is based on an execution environment;

update circuitry to perform an update in response to the current key being changed; and

count circuitry to count progress of the update, wherein

the coding operation comprises using the current key to translate the requested index to an encoded index of the storage circuitry at which the requested data has previously been stored and the update comprises an update of the encoded index of the storage circuitry at which the requested data already stored is held;

the update circuitry is adapted to perform a key update process for the execution environment to make the current key a previous key, and to make a new key the current key;

the update circuitry is adapted to perform the update over a plurality of processor cycles, across the storage circuitry in a given order;

the coding circuitry is adapted to perform the coding operation by selecting one of the current key and the previous key;

when the count circuitry indicates that the update process has reached the encoded index that would be generated using the one of the current key and the previous key, then the encoded index is generated using the current key, and

when the count circuitry indicates that the update process is before the encoded index that would be generated using the one of the current key and the previous key then the encoded index is generated using the previous key.

2. The data processing apparatus according to claim 1 , wherein

the update circuitry is adapted to perform the key update process after a period of time.

3. The data processing apparatus according to claim 1 , wherein

the update circuitry is adapted to perform the key update process every period of time.

4. The data processing apparatus according to claim 1 , wherein

the given order is based on an index of each entry in the storage circuitry.

5. The data processing apparatus according to claim 1 , comprising:

environment storage circuitry to store a reference to the execution environment in association with the current key.

6. The data processing apparatus according to claim 5 , wherein

the reference to the execution environment is also stored in association with the previous key.

7. The data processing apparatus according to claim 5 , wherein

entries of the environment storage circuitry are accessed in parallel.

8. The data processing apparatus according to claim 1 , wherein

the coding circuitry is adapted to perform the coding operation using the current key to translate the requested index to the encoded index of the storage circuitry at which the requested data is stored.

9. The data processing apparatus according to claim 1 , wherein

the update circuitry is adapted to invert a most significant bit of the current key to produce the new key.

10. The data processing apparatus according to claim 1 , wherein

the storage circuitry comprises a plurality of banks;

given bits of the encoded index indicate which of the banks is used to store the requested data; and

the update circuitry is adapted to invert at least one of the given bits of the current key to produce the new key.

11. The data processing apparatus according to claim 10 , wherein

a most significant bit of the given bits is inverted by the update circuitry to produce the new key.

12. The data processing apparatus according to claim 1 , wherein

the storage circuitry provides a mapping between program counter values and data associated with the program counter values.

Assignments (1)

Continuity (1)

References Cited (21)