IP Library › Granted Patent US 12,245,177
Granted Patent B2
US 12,245,177 · App. 17/439,674 · Granted Mar 4, 2025

Methods and systems for downlink transmission and interlace uplink transmission

Inventors: Hong He (San Jose, CA); Chunhai Yao (Beijing, CN); Chunxuan Ye (San Diego, CA); Dawei Zhang (Saratoga, CA); Haitong Sun (Cupertino, CA); Jie Cui (San Jose, CA); Oghenekome Oteri (San Diego, CA); Pengkai Zhao (Cupertino, CA); Wei Zeng (Saratago, CA); Wei Zhang (Santa Clara, CA); Weidong Yang (San Diego, CA); Yang Tang (San Jose, CA); Yuchul Kim (San Jose, CA); Yushu Zhang (Beijing, CN); Zhibin Wu (Los Altos, CA)
Assignee: Apple Inc.
H04W56/0015H04W72/04H04W74/0808
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Quick Facts
Patent No.
US 12,245,177
App. No.
17/439,674
Granted
Mar 4, 2025
Kind
B2
Abstract

Some aspects of this disclosure relate to apparatuses and methods for implementing downlink transmission and interlace uplink transmission. For example, some aspects of this disclosure relate to a base station including a transceiver configured to communicate over a wireless network with a user equipment (UE) and a processor communicatively coupled to the transceiver. The processor divides a plurality of candidate Synchronization Signal Block (SSB) positions in a time window into a plurality of groups and communicates, using the transceiver, information associated with the plurality of groups of candidate SSB positions to the UE. The processor further performs a listen-before-talk (LBT) procedure. In response to the LBT procedure being successful, the processor determines a first group of the plurality of groups and transmits, using the transceiver, one or more SSBs on one or more candidate SSB positions of the first group to the UE.

Claims (30)

1. A base station, comprising:

a transceiver configured to wirelessly communicate with a user equipment (UE); and

a processor communicatively coupled to the transceiver and configured to:

generate a Downlink Channel Indicator (DCI), wherein the DCI comprises interlace resource allocation information for a Physical Uplink Control Channel (PUCCH) and a mapping between an Orthogonal Cover Code (OCC) index applied on an Uplink Control Information (UCI) symbol and a cyclic shift applied to a DeModulation Reference Signal (DMRS) symbol; and

transmit, using the transceiver, the DCI to the UE.

2. The base station of claim 1 , wherein the interlace resource allocation information for the PUCCH comprises a bitmap, wherein a first value of a bit of the bitmap indicates that a corresponding interlace resource is allocated for the PUCCH.

3. The base station of claim 2 , wherein a size of the bitmap is based on a sub-carrier spacing of the PUCCH.

4. The base station of claim 1 , wherein the interlace resource allocation information for the PUCCH comprises a first interlace index and wherein a second interlace index is calculated by the UE using the first interlace index.

5. The base station of claim 4 , wherein the second interlace index is based on the first interlace index and a number of interlaces for a sub-carrier spacing of the PUCCH.

6. The base station of claim 1 , wherein the PUCCH comprises at least one of PUCCH Format 2 or PUCCH Format 3.

7. The base station of claim 1 , wherein the DCI further comprises information for the UE to cycle one or more OCC indices across one or more Physical Resource Blocks (PRBs) within an interlace.

8. The base station of claim 1 , wherein the DCI further comprises information for the UE to apply a scrambling sequence per transmission to one or more symbols associated with the PUCCH.

9. The base station of claim 1 , wherein the processor is further configured to generate System Information Block 1 (SIB1), wherein the SIB1 comprises a value configured to signal interlaced cell-specific PUCCH resource allocation to the UE.

10. A user equipment (UE), comprising:

a transceiver configured to wirelessly communicate with a base station; and

a processor communicatively coupled to the transceiver and configured to:

receive, from the base station, a Downlink Channel Indicator (DCI), wherein the DCI comprises interlace resource allocation information for a Physical Uplink Control Channel (PUCCH) and information for the UE to cycle one or more Orthogonal Cover Code (OCC) indices across one or more Physical Resource Blocks (PRBs) within an interlace; and

allocate resources on the PUCCH based on the interlace resource allocation information.

11. The UE of claim 10 , wherein the interlace resource allocation information for the PUCCH comprises a bitmap, wherein a first value of a bit of the bitmap indicates that a corresponding interlace resource is allocated for the PUCCH.

12. The UE of claim 10 , wherein the interlace resource allocation information for the PUCCH comprises a first interlace index and wherein the processor is further configured to calculate a second interlace index using the first interlace index.

13. The UE of claim 12 , wherein the second interlace index is based on the first interlace index and a number of interlaces for a sub-carrier spacing of the PUCCH.

14. The UE of claim 10 , wherein the interlace resource allocation information for the PUCCH comprises a bitmap, wherein a first value of a bit of the bitmap indicates that a corresponding interlace resource is allocated for the PUCCH, and wherein a size of the bitmap is based on a sub-carrier spacing of the PUCCH.

15. The UE of claim 10 , wherein the DCI further comprise a mapping between an OCC index applied on an Uplink Control Information (UCI) symbol and a cyclic shift applied to a DeModulation Reference Signal (DMRS) symbol.

16. The UE of claim 10 , wherein the DCI further comprises information for the UE to apply a scrambling sequence per transmission to one or more symbols associated with the PUCCH.

17. A method, comprising:

receiving, by a user equipment (UE) and from a base station, a Downlink Channel Indicator (DCI), wherein the DCI comprises interlace resource allocation information for a Physical Uplink Control Channel (PUCCH) and information for the UE to apply a scrambling sequence per transmission to one or more symbols associated with the PUCCH; and

allocating resources on the PUCCH based on the interlace resource allocation information.

18. The method of claim 17 , wherein the interlace resource allocation information comprises a first interlace index and the method further comprises calculating a second interlace index using the first interlace index.

19. The method of claim 17 , wherein the interlace resource allocation information for the PUCCH comprises a bitmap, wherein a first value of a bit of the bitmap indicates that a corresponding interlace resource is allocated for the PUCCH.

20. The method of claim 19 , wherein a size of the bitmap is based on a sub-carrier spacing of the PUCCH.

Continuity (1)
Related Publication 20230073001A1 · Mar 9, 2023
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Cited By (1)
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