IP Library › Granted Patent US 12,249,272
Granted Patent B2
US 12,249,272 · App. 18/486,985 · Granted Mar 11, 2025

Display device and a tiled display device including the same

Inventors: Sang Jin Jeon (Yongin-si, KR); Min Chul Shin (Yongin-si, KR); Jung Hwan Hwang (Yongin-si, KR); Sung Hwan Kim (Yongin-si, KR); Ji Youn Seo (Yongin-si, KR); Kye Uk Lee (Yongin-si, KR)
Assignee: Samsung Display Co., Ltd.
G09G3/32G09G2300/026G09G2310/0275G09G2310/0297G09G2310/08G09G2320/0209
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Quick Facts
Patent No.
US 12,249,272
App. No.
18/486,985
Granted
Mar 11, 2025
Kind
B2
Abstract

Provided are a display device and a tiled display comprising the same. The display device includes PWM data lines for respectively receiving PWM data voltages, first to third data lines for respectively receiving first to third data voltages, sub-pixels respectively connected to the PWM data lines, respectively connected to the first to third data lines, and respectively including at least one light-emitting element, a global power supply line for receiving a global power supply voltage, and a first demultiplexer between the PWM data lines and the global power supply line, wherein the PWM data voltages have grayscale voltages from a black grayscale voltage to a white grayscale voltage, the black grayscale voltage being greater than or equal to the global power supply voltage.

Claims (69)

1. A display device comprising:

PWM data lines for respectively receiving PWM data voltages;

first to third data lines for respectively receiving first to third data voltages;

sub-pixels respectively connected to the PWM data lines, respectively connected to the first to third data lines, and respectively comprising at least one light-emitting element;

a global power supply line for receiving a global power supply voltage; and

a first demultiplexer between the PWM data lines and the global power supply line,

wherein the PWM data voltages have grayscale voltages from a black grayscale voltage to a white grayscale voltage, the black grayscale voltage being greater than or equal to the global power supply voltage.

2. The display device of claim 1 , further comprising a first power supply line for receiving a first power supply voltage, and connected to a first electrode of the at least one light-emitting element,

wherein a voltage difference between the global power supply voltage and the black grayscale voltage is less than a voltage difference between the global power supply voltage and the first power supply voltage.

3. The display device of claim 1 , further comprising:

fan-out lines; and

a second demultiplexer between the PWM data lines and the fan-out lines, and configured to selectively connect the fan-out lines to Q PWM data lines among the PWM data lines, or to Q first to third data lines among the first to third data lines, Q being an integer that is greater than or equal to 2.

4. The display device of claim 3 , further comprising:

a data-driving circuit for supplying the PWM data voltages to the fan-out lines; and

a power supply for supplying the first to third data voltages and the global power supply voltage.

5. The display device of claim 3 , wherein the sub-pixels comprise a first sub-pixel, a second sub-pixel, and a third sub-pixel,

wherein the second demultiplexer is configured to:

connect one of the fan-out lines to a first PWM data line that is connected to the first sub-pixel among the Q PWM data lines during a first period, to a second PWM data line that is connected to the second sub-pixel among the Q PWM data lines during a second period, and to a third PWM data line that is connected to the third sub-pixel among the Q PWM data lines during a third period.

6. The display device of claim 5 , wherein the first demultiplexer is configured to:

connect the second data line connected to the second sub-pixel, and the third data line connected to the third sub-pixel, to the global power supply line during the first period;

connect the first data line connected to the first sub-pixel, and the third data line connected to the third sub-pixel, to the global power supply line during the second period; and

connect the first data line connected to the first sub-pixel, and the second data line connected to the second sub-pixel, to the global power supply line during the third period.

7. The display device of claim 1 , further comprising:

a first data voltage line for receiving the first data voltage;

a second data voltage line for receiving the second data voltage; and

a third data voltage line for receiving the third data voltage,

wherein the first demultiplexer is configured to connect the first data line to the first data voltage line, the second data line to the second data voltage line, and the third data line to the third data voltage line.

8. The display device of claim 1 , wherein the light-emitting element is a flip chip type micro light-emitting diode element.

9. A tiled display device comprising:

display devices; and

a connection member between the display devices,

wherein one display device among the display devices comprises:

PWM data lines for respectively receiving PWM data voltages;

first to third data lines for respectively receiving first to third data voltages;

sub-pixels respectively connected to the PWM data lines, respectively connected to the first to third data lines, and comprising at least one light-emitting element;

a first power supply line connected to a first electrode of the at least one light-emitting element, and for receiving a first power supply voltage;

a global power supply line for receiving a global power supply voltage; and

a first demultiplexer between the PWM data lines and the global power supply line,

wherein the PWM data voltages comprise grayscale voltages ranging from a black grayscale voltage to a white grayscale voltage, and

wherein a voltage difference between the global power supply voltage and the black grayscale voltage is less than a voltage difference between the global power supply voltage and the first power supply voltage.

10. The tiled display device of claim 9 , wherein a potential of the global power supply voltage is less than or equal to the black grayscale voltage.

11. The tiled display device of claim 9 , wherein the one display device further comprises:

fan-out lines; and

a second demultiplexer between the PWM data lines and the fan-out lines, and configured to selectively connect one of the fan-out lines to Q PWM data lines among the PWM data lines, or to Q first to third data lines among the first to third data lines, Q being an integer greater than or equal to 2.

12. The tiled display device of claim 11 , wherein the one display device further comprises:

a substrate;

a first pad on a first surface of the substrate and connected to the global power supply line; and

a first side wiring on the first surface, on a second surface opposite to the first surface, on a side surface between the first surface and the second surface, and connected to the first pad of the substrate.

13. The tiled display device of claim 12 , wherein the substrate comprises glass.

14. The tiled display device of claim 12 , wherein the one display device further comprises:

a first connection line on the second surface of the substrate, and connected to the first side wiring;

a first flexible film connected to the first connection line through a first conductive adhesive member; and

a power supply on the first flexible film, and configured to generate the global power supply voltage and the first to third data voltages.

15. The tiled display device of claim 12 , wherein the one display device further comprises:

a second pad on the first surface of the substrate, and connected to one of the fan-out lines; and

a second side wiring on the first surface, on the second surface, on the side surface, and connected to the second pad.

16. The tiled display device of claim 15 , wherein the first pad is adjacent to a first side of the first surface of the substrate, and

wherein the second pad is adjacent to a second side opposite to the first side of the first surface of the substrate.

17. The tiled display device of claim 15 , wherein the one display device further comprises:

a second connection line on the second surface, and connected to the second side wiring;

a second flexible film connected to the second connection line through a second conductive adhesive member; and

a data-driving circuit on the second flexible film, and configured to generate the PWM data voltages.

18. The tiled display device of claim 9 , wherein the display devices are arranged in a matrix form in M rows and N columns, M and N being positive integers.

19. The tiled display device of claim 9 , wherein the light-emitting element is a flip chip type micro light-emitting diode element.

20. The tiled display device of claim 9 , wherein the one display device further comprises:

a first data voltage line for receiving a first data voltage;

a second data voltage line for receiving a second data voltage; and

a third data voltage line for receiving a third data voltage,

wherein the first demultiplexer is configured to connect the first data lines to the first data voltage line, is configured to connect the second data lines to the second data voltage line, and is configured to connect the third data lines to the third data voltage line.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 20, 2023
From: JEON, SANG JIN; SHIN, MIN CHUL; HWANG, JUNG HWAN; KIM, SUNG HWAN; SEO, JI YOUN; LEE, KYE UK
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 065299/0484 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 20, 2023
From: JEON, SANG JIN; SHIN, MIN CHUL; HWANG, JUNG HWAN; KIM, SUNG HWAN; SEO, JI YOUN; LEE, KYE UK
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 065299/0564 →
Priority Claims (1)
KR 10-2022-0173042 · Dec 12, 2022 · national
Continuity (1)
Related Publication 20240194127A1 · Jun 13, 2024
References Cited (3)
US 20100309185A1 · Koester · 2010 [cited by examiner]
US 20160078814A1 · Ryu · 2016 [cited by examiner]
CN 108281114A · 2018 [cited by applicant]