IP Library Granted Patent US 12,249,651
Granted Patent B2
US 12,249,651 · App. 17/741,219 · Granted Mar 11, 2025

Semiconductor device

Inventors: Hyuncheol Kim (Seoul, KR); Yongseok Kim (Suwon-si, KR); Dongsoo Woo (Seoul, KR); Kyunghwan Lee (Seoul, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
H01L29/7851H01L29/1033H01L29/41791
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Quick Facts
Patent No.
US 12,249,651
App. No.
17/741,219
Granted
Mar 11, 2025
Kind
B2
Abstract

A semiconductor device includes: a channel; a gate structure on the channel; a first source/drain arranged at a first end of the channel and including a metal; a first tunable band-gap layer arranged between the channel and the first source/drain and having a band gap that changes according to stress; a first electrostrictive layer between the gate structure and the first tunable band-gap layer, the first electrostrictive layer having a property of being deformed based on and upon application of an electric field; and a second source/drain at a second end of the channel.

Claims (50)

1. A semiconductor device comprising:

a channel;

a gate structure on the channel;

a first source/drain at a first end of the channel, the first source/drain comprising a metal;

a first tunable band-gap layer between the channel and the first source/drain, the first tunable band-gap layer having a band gap that varies according to stress;

a first electrostrictive layer between the gate structure and the first tunable band-gap layer, the first electrostrictive layer having a property of being deformed based on and upon application of an electric field; and

a second source/drain at a second end of the channel.

2. The semiconductor device of claim 1 , wherein the band gap of the first tunable band-gap layer varies according to a voltage applied to the gate structure.

3. The semiconductor device of claim 1 , wherein:

contact resistance between the first source/drain and the first tunable band-gap layer when an ON-voltage is applied to the gate structure is less than the contact resistance between the first source/drain and the first tunable band-gap layer when an OFF-voltage is applied to the gate structure, and

the first source/drain and the first tunable band-gap layer form an Ohmic junction, when the ON-voltage is applied to the gate structure.

4. The semiconductor device of claim 1 , wherein the band gap of the first tunable band-gap layer when an OFF-voltage is applied to the gate structure is greater than the band gap of the first tunable band-gap layer when an ON-voltage is applied to the gate structure.

5. The semiconductor device of claim 1 , wherein the first tunable band-gap layer comprises a multi-layered 2-dimensional material.

6. The semiconductor device of claim 1 , further comprising:

a gate dielectric layer between the channel and the gate structure.

7. The semiconductor device of claim 1 , wherein the first electrostrictive layer extends between the channel and the gate structure.

8. The semiconductor device of claim 1 , wherein:

the second source/drain comprises a metal, and

the semiconductor device further comprises a second tunable band-gap layer between the channel and the second source/drain, the second tunable band-gap layer having a band gap that varies according to stress.

9. The semiconductor device of claim 8 , wherein the first electrostrictive layer extends between the gate structure and the second tunable band-gap layer.

10. The semiconductor device of claim 8 , further comprising:

a second electrostrictive layer between the gate structure and the second tunable band-gap layer.

11. The semiconductor device of claim 8 , wherein the band gap of the second tunable band-gap layer varies according to a voltage applied to the gate structure.

12. The semiconductor device of claim 8 , wherein:

contact resistance between the second source/drain and the second tunable band-gap layer when an ON-voltage is applied to the gate structure is less than the contact resistance between the second source/drain and the second tunable band-gap layer when an OFF-voltage is applied to the gate structure, and

the second source/drain and the second tunable band-gap layer form an Ohmic junction, when the ON-voltage is applied to the gate structure.

13. The semiconductor device of claim 8 , wherein the band gap of the second tunable band-gap layer when an OFF-voltage is applied to the gate structure is greater than the band gap of the second tunable band-gap layer when an ON-voltage is applied to the gate structure.

14. The semiconductor device of claim 8 , wherein the second tunable band-gap layer comprises a multi-layered 2-dimensional material.

15. The semiconductor device of claim 1 , further comprising

a semiconductor substrate that has a fin structure protruding from a main surface of the semiconductor substrate, wherein the channel comprises at least a portion of the fin structure of the semiconductor substrate.

16. The semiconductor device of claim 1 , further comprising:

a semiconductor substrate including a recess recessed from a main surface of the semiconductor substrate, wherein the channel comprises a portion around the recess of the semiconductor substrate.

17. The semiconductor device of claim 16 , wherein the first electrostrictive layer extends between the gate structure and the first source/drain.

18. The semiconductor device of claim 1 , wherein:

the channel comprises a plurality of portions apart from each other, and

the gate structure surrounds the plurality of portions of the channel.

19. A semiconductor device comprising:

a semiconductor substrate having a recess;

a gate structure in the recess of the semiconductor substrate;

a first source/drain on the semiconductor substrate at a first side of the gate structure, the first source/drain comprising a metal;

a 2-dimensional material layer between the semiconductor substrate and the first source/drain;

an electrostrictive layer between the gate structure and the 2-dimensional material layer, the electrostrictive layer having a property of being deformed based on and upon application of an electric field; and

a second source/drain on the semiconductor substrate at a second side of the gate structure opposite the first side.

20. A semiconductor device comprising:

a semiconductor substrate having a recess;

a gate structure in the recess of the semiconductor substrate;

a tunable band-gap layer between the semiconductor substrate and the gate structure, the tunable band-gap layer having a band gap that varies according to stress;

an electrostrictive layer between the tunable band-gap layer and the gate structure, the electrostrictive layer having a property of being deformed based on and upon application of an electric field;

a first source/drain at a first end of the tunable band-gap layer; and

a second source/drain at a second end of the tunable band-gap layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 21, 2022
From: KIM, HYUNCHEOL; KIM, YONGSEOK; WOO, DONGSOO; LEE, KYUNGHWAN
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 060257/0766 →
Priority Claims (1)
KR 10-2021-0120539 · Sep 9, 2021 · national
Continuity (1)
Related Publication 20230075559A1 · Mar 9, 2023
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