IP Library › Granted Patent US 12,249,963
Granted Patent B2
US 12,249,963 · App. 17/628,083 · Granted Mar 11, 2025

Method for enhancing power amplifier efficiency and linearity and power amplifier

Inventors: Seyed Bagher Rabet (La Jolla, CA); Peter M. Asbeck (Del Mar, CA)
Assignee: The Regents of the University of California
H03F1/0288H03F1/32H03F1/56H03F3/245H03F2200/451
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Quick Facts
Patent No.
US 12,249,963
App. No.
17/628,083
Granted
Mar 11, 2025
Kind
B2
Abstract

A method for power amplification uses circuitry including a main amplifier and an auxiliary amplifier that are constructed and operate such that an input is applied to the main and auxiliary amplifiers via an input network. At low power levels, the auxiliary amplifier is off and the main amplifier sees a large impedance. At maximum power level, both the auxiliary and main amplifiers operate at full power and there is a constant phase shift between them. While transitioning from low to maximum power, systematic AM-AM and AM-PM variations generated due to the phase shift provided by the input network, bias differences between the main and auxiliary amplifiers, and nature of the output combiner to compensate device related distortions.

Claims (36)

1. A method for power amplification using circuitry including a main amplifier and an auxiliary amplifier that are constructed and operate such that:

an input is applied to the main and auxiliary amplifiers via a passive input network;

at low power levels the auxiliary amplifier is off and the main amplifier sees a large impedance;

at maximum power level both the auxiliary and main amplifiers operate at full power and there is a constant phase shift between them; and

while transitioning from low to maximum power, systematic AM-AM and AM-PM variations are generated by the passive input network and load-pulling between the main and auxiliary amplifiers via a combiner that has a phase difference between main and auxiliary branches, wherein the systematic AM-AM and AM-PM variations compensate device related distortions that arise from varying voltage swings in transistors of the main and auxiliary amplifiers.

2. The method of claim 1 , wherein the input network applies a constant phase shift in a path to one of the auxiliary and main amplifiers to achieve the signal phase shift at their outputs.

3. A method for power amplification using circuitry including a main amplifier and an auxiliary amplifier that are constructed and operate such that:

an input is applied to the main and auxiliary amplifiers via an input network;

at low power levels the auxiliary amplifier is off and the main amplifier sees a large impedance;

at maximum power level both the auxiliary and main amplifiers operate at full power and there is a constant phase shift between them; and

while transitioning from low to maximum power, systematic AM-AM and AM-PM variations are generated and used to compensate device related distortions,

wherein the input network applies a constant phase shift in a path to one of the auxiliary and main amplifiers to achieve the signal phase shift at their outputs, and

wherein the phase distortion at the output is minimized by a balance between the device-induced phase distortion as the power level varies, and the systematic phase variation created by passive networks and operation of the main and auxiliary amplifiers, which varies the output phase as the auxiliary amplifier output power increases.

4. The method of claim 1 , wherein the main amplifier comprises a class-AB amplifier.

5. The method of claim 4 , wherein the auxiliary amplifier comprises a class-C amplifier.

6. The method of claim 1 , wherein the auxiliary amplifier comprises an amplifier that uses a power-level dependent input bias voltage applied to the gate or base of the transistors that causes them to operate in a mode that changes continuously between class-C and class-AB.

7. The method of claim 1 , comprising turning the auxiliary amplifier on before the main amplifier enters saturation mode.

8. The method of claim 1 , comprising operating the main amplifier at saturation and the auxiliary amplifier at monotonically increasing power levels after it is turned on.

9. The method of claim 1 , comprising providing the auxiliary amplifier with a higher supply voltage (or larger transistor device size) than the main amplifier in order to match the voltage swings of the main and auxiliary amplifiers at maximum power.

10. The method of claim 1 , comprising providing systematic AM-AM and AM-PM changes that are in the opposite direction of gain compression and AM-PM distortion caused by device non-idealities.

11. The method of claim 10 , A method for power amplification using circuitry including a main amplifier and an auxiliary amplifier that are constructed and operate such that:

an input is applied to the main and auxiliary amplifiers via an input network;

at low power levels the auxiliary amplifier is off and the main amplifier sees a large impedance;

at maximum power level both the auxiliary and main amplifiers operate at full power and there is a constant phase shift between them; and

while transitioning from low to maximum power, systematic AM-AM and AM-PM variations are generated and used to compensate device related distortions,

wherein the input network applies a constant phase shift in a path to one of the auxiliary and main amplifiers to achieve the signal phase shift at their outputs,

providing systematic AM-AM and AM-PM changes that are in the opposite direction of gain compression and AM-PM distortion caused by device non-idealities, and wherein the systematic AM-AM variation is produced by increasing output power of the auxiliary amplifier, and systematic AM-PM variation is produced by the input phase shift between the input paths to the main and auxiliary amplifiers in conjunction with the operation of the amplifiers and an output Chireix combiner.

12. The method of claim 1 , wherein systematic AM-AM and AM-PM variation is produced using a phase shift between main and auxiliary paths and their biases, as well as an output Chireix combiner to meet linearity specifications without applying digital predistortion or any other correction method to the input.

13. A power amplifier, comprising:

an input;

a split to apply an input signal from the input to a main amplifier and an auxiliary amplifier;

a passive input network before the input of one of the main and the auxiliary amplifiers to provide a phase shift; wherein the main and auxiliary amplifiers and the output combiner are configured such that at low power levels the auxiliary amplifier is off and the main amplifier sees a large impedance;

at maximum power level both the auxiliary and main amplifiers operate at full power and there is a constant phase shift between them; and

while transitioning from low to maximum power, the systematic AM-AM and AM-PM variations generated by the input phase shift and a load-pulling operation between the main and auxiliary amplifiers via the output combiner combiner compensate for device related distortions that arise from varying voltage swings in transistors of the main and auxiliary amplifiers.

14. The power amplifier of claim 13 , wherein the main amplifier comprises a class-AB amplifier and the auxiliary amplifier comprises a class-C amplifier.

15. The power amplifier of claim 13 , wherein the main amplifier comprises a class-AB amplifier and the auxiliary amplifier uses a power-level dependent input bias voltage applied to the gate or base of the transistors that changes their mode of operation continuously from class-C to class-AB.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 18, 2022
From: ASBECK, PETER M.; RABET, SEYED BAGHER
To: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
Reel/Frame 058682/0809 →
Continuity (2)
Provisional Application 62880320 · Jul 30, 2019
Related Publication 20220263475A1 · Aug 18, 2022
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