IP Library › Granted Patent US 12,255,094
Granted Patent B2
US 12,255,094 · App. 17/739,114 · Granted Mar 18, 2025

Semiconductor device

Inventors: Jun Hyuk Lim (Hwaseong-si, KR); Jong Min Baek (Seoul, KR); Deok Young Jung (Seoul, KR); Sung Jin Kang (Seoul, KR); Jang Ho Lee (Incheon, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
H01L21/76829H01L21/76816H01L21/76841H01L21/76877H01L21/823468H01L23/5226
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Quick Facts
Patent No.
US 12,255,094
App. No.
17/739,114
Granted
Mar 18, 2025
Kind
B2
Abstract

There is provided a semiconductor device including an etching stop film which is placed disposed on a substrate; an interlayer insulating film which is disposed on the etching stop film; a trench which penetrates the interlayer insulating film and the etching stop film; a spacer which extends along side walls of the trench; a barrier film which extends along the spacer and a bottom surface of the trench; and a filling film which fills the trench on the barrier film. The trench includes a first trench and a second trench which are spaced apart from each other in a first direction and have different widths from each other in the first direction. A bottom surface of the second trench is placed disposed below a bottom surface of the first trench.

Claims (58)

1. A semiconductor device comprising:

an etching stop film which is disposed on a substrate;

an interlayer insulating film which is disposed on the etching stop film;

a trench which penetrates the interlayer insulating film and the etching stop film;

a spacer which extends along side walls of the trench;

a barrier film which extends along the spacer and a bottom surface of the trench; and

a filling film which fills the trench on the barrier film,

wherein the trench includes a first trench and a second trench which are spaced apart from each other in a first direction and have different widths from each other in the first direction, and

wherein a bottom surface of the second trench is disposed below a bottom surface of the first trench.

2. The semiconductor device of claim 1 , wherein, in the first direction, a width of the first trench is smaller than a width of the second trench.

3. The semiconductor device of claim 1 , wherein the bottom surface of the second trench is disposed below a bottom surface of the etching stop film.

4. The semiconductor device of claim 3 , wherein the second trench penetrates at least a part of the substrate, and

wherein the spacer extends along side walls of the second trench that penetrates the interlayer insulating film, and does not extend along the side walls of the second trench that penetrates the substrate.

5. The semiconductor device of claim 1 , wherein a thickness of the spacer on the side walls of the trench decreases as the spacer goes away from the substrate.

6. The semiconductor device of claim 1 , wherein the trench further includes a recess which is convex toward the etching stop film between the interlayer insulating film and the etching stop film, and

wherein the spacer fills the recess.

7. The semiconductor device of claim 1 , wherein the spacer includes a first spacer extending along the side walls of the first trench, and a second spacer extending along the side walls of the second trench, and

wherein a thickness of the first spacer on the side walls of the first trench is different from a thickness of the second spacer on the side walls of the second trench.

8. The semiconductor device of claim 1 , wherein the spacer includes a first spacer extending along the side walls of the first trench, and a second spacer extending along the side walls of the second trench, and

wherein a thickness of the first spacer on the side walls of the first trench is the same as a thickness of the second spacer on the side walls of the second trench.

9. The semiconductor device of claim 1 , wherein the spacer includes a first spacer film extending along the side walls of the trench, and a second spacer film disposed between the first spacer film and the barrier film.

10. The semiconductor device of claim 9 , wherein the first spacer film includes the same material as the second spacer film.

11. The semiconductor device of claim 9 , wherein the first spacer film includes a material different from the second spacer film.

12. The semiconductor device of claim 1 , wherein the entire of the barrier film is spaced apart from the interlayer insulating film by the spacer.

13. The semiconductor device of claim 1 , wherein an upper side wall of the spacer is rounded.

14. A semiconductor device comprising:

a first interlayer insulating film which includes a via;

an etching stop film which is disposed on the first interlayer insulating film;

a second interlayer insulating film which is disposed on the etching stop film;

a first trench which penetrates at least a part of the second interlayer insulating film and the etching stop film, and includes a first recess which is convex toward the etching stop film between the first interlayer insulating film and the second interlayer insulating film;

a first spacer which extends along side walls of the first trench and fills the first recess; and

a first wiring which fills the first trench on the first spacer,

wherein the first spacer is disposed between the second interlayer insulating film and the first wiring, and is not disposed between the first interlayer insulating film and the first wiring.

15. The semiconductor device of claim 14 , wherein a thickness of the first spacer decreases as the first spacer goes away from the first interlayer insulating film.

16. The semiconductor device of claim 14 , further comprising:

a second trench which is spaced apart from the first trench in a first direction, penetrates at least a part of the second interlayer insulating film, the etching stop film, and the first interlayer insulating film, and includes a second recess which is convex toward the etching stop film between the first interlayer insulating film and the second interlayer insulating film;

a second spacer which extends along side walls of the second trench and fills the second recess; and

a second wiring which fills the second trench on the second spacer,

wherein a width of the second trench is greater than a width of the first trench in the first direction, and

wherein a bottom surface of the second trench is disposed below a bottom surface of the first trench.

17. The semiconductor device of claim 16 , wherein at a first height point from the etching stop film, a thickness of the first spacer on the side walls of the first trench is greater than a thickness of the second spacer on the side walls of the second trench.

18. The semiconductor device of claim 16 , wherein the second spacer is disposed between the second interlayer insulating film and the second wiring, and is not disposed between the first interlayer insulating film and the second wiring.

19. The semiconductor device of claim 14 , wherein the first spacer includes a first spacer film and a second spacer film, which are sequentially disposed between the second interlayer insulating film and the first wiring.

20. A semiconductor device comprising:

a first interlayer insulating film which includes a via;

an etching stop film which is disposed on the first interlayer insulating film;

a second interlayer insulating film which is disposed on the etching stop film;

a first trench which penetrates the second interlayer insulating film and the etching stop film, and includes a first recess that is convex toward the etching stop film between the first interlayer insulating film and the second interlayer insulating film;

a second trench which is spaced apart from the first trench in a first direction, penetrates at least a part of the second interlayer insulating film, the etching stop film and the first interlayer insulating film, and includes a second recess that is convex toward the etching stop film between the first interlayer insulating film and the second interlayer insulating film;

a first spacer which extends along side walls of the first trench and fills the first recess;

a first barrier film which extends along the first spacer and a bottom surface of the first trench exposed by the first spacer;

a first filling film which fills the first trench on the first barrier film;

a second spacer which extends along side walls of the second trench and fills the second recess;

a second barrier film which extends along the second spacer and a bottom surface and side walls of the second trench exposed by the second spacer; and

a second filling film which fills the second trench on the second barrier film,

wherein a width of the first trench in the first direction is smaller than a width of the second trench,

wherein the bottom surface of the first trench is disposed above the bottom surface of the second trench, and

wherein, at a first height point from the etching stop film, a thickness of the first spacer on the side walls of the first trench is greater than a thickness of the second spacer on the side walls of the second trench.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 14, 2022
From: LIM, JUN HYUK; BAEK, JONG MIN; JUNG, DEOK YOUNG; KANG, SUNG JIN; LEE, JANG HO
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 060195/0342 →
Priority Claims (1)
KR 10-2021-0071632 · Jun 2, 2021 · national
Continuity (1)
Related Publication 20220392800A1 · Dec 8, 2022
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Cited By (1)
US 12,685,109