IP Library › Granted Patent US 12,255,533
Granted Patent B2
US 12,255,533 · App. 17/895,046 · Granted Mar 18, 2025

Power converter with loading detector for enhancing conversion efficiency

Inventors: Yi-Meng Lan (Tainan, TW); Yung-Chou Lin (Kaohsiung, TW); Tuo-Kuang Chen (Hsinchu, TW); Chih-Yang Kang (Baoshan Township, Hsinchu County, TW)
Assignee: Novatek Microelectronics Corp.
H02M3/158H02M1/0006H02M1/0032H02M1/08H02M3/1566
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Quick Facts
Patent No.
US 12,255,533
App. No.
17/895,046
Granted
Mar 18, 2025
Kind
B2
Abstract

A power converter includes a high side switch, a low side switch, a low side driver, a loading detector, a configurable regulator and a high side driver. The low side driver generates a low side drive signal to control the low side switch. The configurable regulator generates a regulation voltage, a magnitude of which is greater when the loading detector detects that the power converter has light loading than when the loading detector detects that the power converter has heavy loading. The high side driver generates a high side drive signal that switches between the input voltage and the regulation voltage to control the high side switch.

Claims (48)

1. A power converter comprising:

a high side switch having a first terminal that receives an input voltage, a second terminal that is adapted to be coupled to an inductor, and a control terminal that receives a high side drive signal;

a low side switch having a first terminal that is coupled to said second terminal of said high side switch, a second terminal that is adapted to be coupled to a load and that provides an output voltage, and a control terminal that receives a low side drive signal;

a low side driver coupled to said control terminal of said low side switch, and generating the low side drive signal for receipt by said control terminal of said low side switch;

a loading detector receiving the low side drive signal and generating an indication output based on the low side drive signal;

a configurable regulator coupled to said loading detector to receive the indication output, and generating a regulation voltage based on the indication output; and

a high side driver coupled to said configurable regulator to receive the regulation voltage, further coupled to said control terminal of said high side switch, further receiving the input voltage, and generating the high side drive signal,

wherein said configurable regulator is further coupled to said second terminal of said low side switch to receive the output voltage, and further receives the input voltage and a reference voltage,

wherein the indication output includes an indication signal and an inverted indication signal, and said configurable regulator includes:

a first resistor having a first terminal that receives the input voltage, and a second terminal;

a second resistor having a first terminal that receives the input voltage, and a second terminal;

a first transistor having a first terminal that is coupled to said second terminal of said first resistor, a second terminal, and a control terminal that is coupled to said second terminal of said first transistor;

a second transistor having a first terminal that is coupled to said second terminal of said second resistor, a second terminal, and a control terminal that is coupled to said control terminal of said first transistor;

a current source coupled between said second terminal of said first transistor and said second terminal of said second transistor;

a first switch having a first terminal that is coupled to said second terminal of said second transistor, a second terminal that receives the reference voltage, and a control terminal that is coupled to said loading detector to receive the indication signal; and

a second switch having a first terminal that is coupled to said second terminal of said second transistor, a second terminal that is coupled to said second terminal of said low side switch to receive the output voltage, and a control terminal that is coupled to said loading detector to receive the inverted indication signal;

the regulation voltage being provided at a common node of said second resistor and said second transistor.

2. The power converter of claim 1 , wherein the regulation voltage is equal to the reference voltage in magnitude when the indication output indicates that said power converter has light loading, and is smaller than the reference voltage in magnitude and greater than the output voltage in magnitude when the indication output indicates that said power converter has heavy loading.

3. The power converter of claim 1 , wherein said loading detector is further coupled to said low side driver to receive the low side drive signal, further receives a clock signal, and generates the indication output based on the low side drive signal and the clock signal.

4. The power converter of claim 3 , wherein:

the indication output includes an indication signal and an inverted indication signal; and

upon each falling edge of the clock signal, said loading detector causes the indication signal to be a logical complement of the low side drive signal in logic value, and causes the inverted indication signal to be identical to the low side drive signal in logic value.

5. The power converter of claim 3 , wherein the indication output includes an indication signal and an inverted indication signal, and said loading detector includes:

a first inverter having an input terminal that is coupled to said low side driver to receive the low side drive signal, and an output terminal;

a second inverter having an input terminal that receives the clock signal, and an output terminal; and

a D flip-flop having a data input terminal that is coupled to said output terminal of said first inverter, a clock input terminal that is coupled to said output terminal of said second inverter, a data output terminal that is coupled to said configurable regulator and that provides the indication signal, and an inverting data output terminal that is coupled to said configurable regulator and that provides the inverted indication signal.

6. A power converter comprising:

a high side switch having a first terminal that receives an input voltage, a second terminal that is adapted to be coupled to an inductor, and a control terminal that receives a high side drive signal;

a low side switch having a first terminal that is coupled to said second terminal of said high side switch, a second terminal that is adapted to be coupled to a load and that provides an output voltage, and a control terminal that receives a low side drive signal;

a low side driver coupled to said control terminal of said low side switch, and generating the low side drive signal for receipt by said control terminal of said low side switch;

a loading detector receiving the low side drive signal and generating an indication output based on the low side drive signal;

a configurable regulator coupled to said loading detector to receive the indication output, and generating a regulation voltage based on the indication output; and

a high side driver coupled to said configurable regulator to receive the regulation voltage, further coupled to said control terminal of said high side switch, further receiving the input voltage, and generating the high side drive signal, wherein

said loading detector is further coupled to said low side driver to receive the low side drive signal, further receives a clock signal, and generates the indication output based on the low side drive signal and the clock signal,

the indication output includes an indication signal and an inverted indication signal, and

upon each falling edge of the clock signal, said loading detector causes the indication signal to be a logical complement of the low side drive signal in logic value, and causes the inverted indication signal to be identical to the low side drive signal in logic value.

7. A power converter comprising:

a high side switch having a first terminal that receives an input voltage, a second terminal that is adapted to be coupled to an inductor, and a control terminal that receives a high side drive signal;

a low side switch having a first terminal that is coupled to said second terminal of said high side switch, a second terminal that is adapted to be coupled to a load and that provides an output voltage, and a control terminal that receives a low side drive signal;

a low side driver coupled to said control terminal of said low side switch, and generating the low side drive signal for receipt by said control terminal of said low side switch;

a loading detector receiving the low side drive signal and generating an indication output based on the low side drive signal;

a configurable regulator coupled to said loading detector to receive the indication output, and generating a regulation voltage based on the indication output; and

a high side driver coupled to said configurable regulator to receive the regulation voltage, further coupled to said control terminal of said high side switch, further receiving the input voltage, and generating the high side drive signal,

wherein said loading detector is further coupled to said low side driver to receive the low side drive signal, further receives a clock signal, and generates the indication output based on the low side drive signal and the clock signal,

wherein the indication output includes an indication signal and an inverted indication signal, and said loading detector includes:

a first inverter having an input terminal that is coupled to said low side driver to receive the low side drive signal, and an output terminal;

a second inverter having an input terminal that receives the clock signal, and an output terminal; and

a D flip-flop having a data input terminal that is coupled to said output terminal of said first inverter, a clock input terminal that is coupled to said output terminal of said second inverter, a data output terminal that is coupled to said configurable regulator and that provides the indication signal, and an inverting data output terminal that is coupled to said configurable regulator and that provides the inverted indication signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 25, 2022
From: LAN, YI-MENG; LIN, YUNG-CHOU; CHEN, TUO-KUANG; KANG, CHIH-YANG
To: NOVATEK MICROELECTRONICS CORP.
Reel/Frame 060904/0083 →
Continuity (1)
Related Publication 20240072669A1 · Feb 29, 2024
References Cited (14)
US 6744649B1 · Yang · 2004 [cited by examiner]
US 20060132179A1 · Kim · 2006 [cited by examiner]
US 20080007241A1 · Isham · 2008 [cited by examiner]
US 20100013452A1 · Tang · 2010 [cited by examiner]
US 20160065072A1 · Xiu · 2016 [cited by examiner]
US 20170302178A1 · Bandyopadhyay et al. · 2017 [cited by applicant]
US 20170358984A1 · Unno · 2017 [cited by examiner]
US 20190081549A1 · Lee · 2019 [cited by examiner]
US 20210184576A1 · Cattani · 2021 [cited by examiner]
US 20210391795A1 · Gandhi · 2021 [cited by examiner]
US 20230198376A1 · Abesingha · 2023 [cited by examiner]
US 20240030812A1 · D'Souza · 2024 [cited by examiner]
TW 202143611 · 2021 [cited by applicant]
“Office Action of Taiwan Counterpart Application”, issued on Jan. 31, 2023, p. 1-p. 7. [cited by applicant]