IP Library › Granted Patent US 12,259,821
Granted Patent B2
US 12,259,821 · App. 17/310,368 · Granted Mar 25, 2025

Lookup circuitry for secure and non-secure storage

Inventors: Simon John Craske (Cambridge, GB); Jacob Eapen (Cambridge, GB)
Assignee: Arm Limited
G06F12/10G06F12/1416G06F2212/1052
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Quick Facts
Patent No.
US 12,259,821
App. No.
17/310,368
Granted
Mar 25, 2025
Kind
B2
Abstract

There is provided an apparatus comprising input circuitry that receives requests comprising input addresses in an input domain. Output circuitry provides output addresses. The output addresses comprise secure physical addresses to secure storage circuitry and non-secure physical addresses to non-secure storage circuitry. Lookup circuitry stores a plurality of mappings comprising at least one mapping between the input addresses and the secure physical addresses, and at least one mapping between the input addresses and the non-secure physical addresses.

Claims (46)

1. An apparatus comprising:

input circuitry configured to receive requests comprising input addresses in an input domain;

output circuitry configured to provide output addresses, wherein the output addresses comprise secure physical addresses to secure storage circuitry and non-secure physical addresses to non-secure storage circuitry;

lookup circuitry configured to store a plurality of entries that indicate, for each of the input addresses, a corresponding one of the output addresses, wherein at least one of the entries relates to one of the secure physical addresses, and at least one of the entries relates to one of the non-secure physical addresses, wherein each entry in the entries comprises a security indicator to indicate whether the entry is a secure physical addresses or whether the entry is a non-secure physical addresses;

protection circuitry configured to control access to the secure storage circuitry and the non-secure storage circuitry in dependence on the security indicator; and

storage circuitry configured to store one or more settings to perform one or more error actions to control behavior of the protection circuitry when the request type field and the security indicator are other than the same,

wherein each request in the requests comprises a request type field to indicate whether an input address in that request is associated with one of the secure physical addresses or one of the non-secure physical addresses.

2. The apparatus according to claim 1 , wherein the apparatus is a Memory Protection Unit.

3. The apparatus according to claim 1 , wherein

the input address is an Intermediate Physical Address; and,

the entries comprise mappings from the input addresses to the secure physical addresses and from the input addresses to the non-secure physical addresses.

4. The apparatus according to claim 1 , wherein the protection circuitry is adapted to control access to the secure storage circuitry and the non-secure storage circuitry in dependence on the security indicator and the request type field.

5. The apparatus according to claim 1 , wherein when the request type field and the security indicator match, the protection circuitry permits the request to proceed.

6. The apparatus according to claim 1 , wherein

when the request type field indicates the input address is associated with the non-secure storage circuitry and the security indicator indicates the input address is associated with the non-secure circuitry, the protection circuitry is configured to forwards the request to the non-storage secure storage circuitry.

7. The apparatus according to claim 1 , wherein

when the request type field indicates the input address is associated with the secure storage circuitry and the security indicator indicates the input address is associated with the secure storage circuitry, the protection circuitry is configured to forwards the request to the secure storage circuitry.

8. The apparatus according to claim 1 , wherein

when the request type field indicates the input address is associated with the secure storage circuitry and the security indicator indicates the input address is associated with the non-secure storage circuitry, the protection circuitry is configured to performs the error actions; and,

when the request type field indicates the input address is associated with the non-secure storage circuitry and the security indicator indicates the input address is associated with the secure storage circuitry, the protection circuitry is configured to perform the error actions.

9. The apparatus according to claim 1 , wherein

the error actions comprise forwarding the request to the least secure of the storage circuitries indicated by the request type field and the security indicator.

10. The apparatus according to claim 1 , wherein

the error actions comprise forwarding the request to the most secure of the storage circuitries indicated by the request type field and the security indicator.

11. The apparatus according to claim 1 , wherein

the error actions comprise generating a fault.

12. The apparatus according to claim 11 , wherein

the fault corresponds with an invalid page fault.

13. The apparatus according to claim 1 , comprising:

the request comprises an override field to indicate whether the protection circuitry should be overridden.

14. The apparatus according to claim 13 , wherein

the override field is adapted to indicate whether the request should be forwarded to the secure storage circuitry or the non-secure circuitry, irrespective of the security indicator.

15. A method comprising:

receiving requests comprising input addresses in an input domain;

providing output addresses, wherein the output addresses comprise secure physical addresses to secure storage circuitry and non-secure physical addresses to non-secure storage circuitry; and,

storing a plurality of entries that indicate, for each of the input addresses, a corresponding one of the output addresses, wherein at least one of the entries relates to one of the secure physical addresses, and at least one of the entries relates to one of the non-secure physical addresses, wherein each entry in the entries comprises a security indicator to indicate whether the entry is a secure physical addresses or whether the entry is a non-secure physical addresses;

controlling access to the secure storage circuitry and the non-secure storage circuitry in dependence on the security indicator; and

storing one or more settings to perform one or more error actions when the request type field and the security indicator are other than the same,

wherein each request in the requests comprises a request type field to indicate whether an input address in that request is associated with one of the secure physical addresses or one of the non-secure physical addresses.

16. An apparatus comprising:

means for receiving requests comprising input addresses in an input domain;

means for providing output addresses, wherein the output addresses comprise secure physical addresses to secure storage circuitry and non-secure physical addresses to non-secure storage circuitry; and,

means for storing a plurality of entries that indicate, for each of the input addresses, a corresponding one of the output addresses, wherein at least one of the entries relates to one of the secure physical addresses, and at least one of the entries relates to one of the non-secure physical addresses, wherein each entry in the entries comprises a security indicator to indicate whether the entry is a secure physical addresses or whether the entry is a non-secure physical addresses;

means for controlling access to the secure storage circuitry and the non-secure storage circuitry in dependence on the security indicator; and

means for storing one or more settings to perform one or more error actions when the request type field and the security indicator are other than the same,

wherein each request in the requests comprises a request type field to indicate whether an input address in that request is associated with one of the secure physical addresses or one of the non-secure physical addresses.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 19, 2021
From: CRASKE, SIMON JOHN; EAPEN, JACOB
To: ARM LIMITED
Reel/Frame 057228/0946 →
Priority Claims (1)
GB 1901436 · Feb 1, 2019 · national
Continuity (1)
Related Publication 20220100673A1 · Mar 31, 2022
References Cited (27)
US 7216362B1 · Strongin · 2007 [cited by examiner]
US 7228400B2 · Sheriff · 2007 [cited by examiner]
US 20040143714A1 · Watt · 2004 [cited by applicant]
US 20140181359A1 · Zhang · 2014 [cited by examiner]
US 20150277763A1 · Zhou · 2015 [cited by examiner]
US 20160034216A1 · Chun et al. · 2016 [cited by applicant]
US 20160140073A1 · Sanzone et al. · 2016 [cited by applicant]
US 20160197722A1 · Mothilal · 2016 [cited by applicant]
US 20160364338A1 · Zmudzinski et al. · 2016 [cited by applicant]
US 20170097896A1 · Molnar et al. · 2017 [cited by applicant]
US 20170139844A1 · Zavalney · 2017 [cited by examiner]
US 20170185539A1 · Xu et al. · 2017 [cited by applicant]
US 20170249260A1 · Sahita et al. · 2017 [cited by applicant]
US 20190171585A1 · Yonemura · 2019 [cited by examiner]
CN 1711525 · 2005 [cited by applicant]
CN 101520753 · 2009 [cited by applicant]
JP 2006506751 · 2006 [cited by applicant]
JP 2009211698 · 2009 [cited by applicant]
JP 20174522 · 2017 [cited by applicant]
TW I486760 · 2015 [cited by applicant]
TW I488041 · 2015 [cited by applicant]
TW I525431 · 2016 [cited by applicant]
Office Action for IN Application No. 202117034247 dated Feb. 14, 2023, 6 pages. [cited by applicant]
Office Action for TW Application No. 109102109 issued Dec. 25, 2023 and English translation, 12 pages. [cited by applicant]
Office Action for JP Application No. 2021-544603 issued Jan. 26, 2024 and English translation, 8 pages. [cited by applicant]
Office Action for EP Application No. 20703813.4 dated Mar. 15, 2024, 5 pages. [cited by applicant]
Office Action for CN Application No. 202080012264.2 issued Sep. 28, 2024 and English translation, 33 pages. [cited by applicant]