Power-save mode for fixed-frequency DC-DC converter
In a circuit for DC-DC voltage converters, an amplifier has first and second inputs coupled to a reference voltage terminal and an output voltage terminal, respectively. A comparator has first and second inputs coupled to an amplifier output and a switching terminal, respectively. A logic circuit has inputs coupled to the comparator output and a clock terminal. A driver circuit has first and second inputs coupled to first and second logic outputs, respectively. A first transistor having a first control terminal coupled to the first driver output is coupled between a supply voltage terminal and the switching terminal. A second transistor is coupled between the switching terminal and a ground terminal, and has a second control terminal coupled to the second driver output. A threshold detection circuit is configured to provide a threshold signal responsive to a current through the second transistor crossing a current threshold.
1. A circuit comprising:
an amplifier having an amplifier output and first and second amplifier inputs, in which the first amplifier input is coupled to a reference voltage terminal, and the second amplifier input is coupled to an output voltage terminal;
a comparator having a comparator output and first and second comparator inputs, in which the first comparator input is coupled to the amplifier output, and the second comparator input is coupled to a switching terminal;
a logic circuit having first, second and third logic inputs and first and second logic outputs, in which the first logic input is coupled to the comparator output, and the second logic input is coupled to a clock terminal;
a driver circuit having first and second driver inputs and first and second driver outputs, in which the first driver input is coupled to the first logic output, and the second driver input is coupled to the second logic output;
a first transistor coupled between a supply voltage terminal and the switching terminal and having a first control terminal, in which the first control terminal is coupled to the first driver output;
a second transistor coupled between the switching terminal and a ground terminal and having a second control terminal, in which the second control terminal is coupled to the second driver output;
a threshold detection circuit having a threshold detection input and a threshold detection output, in which the threshold detection input is coupled to the second transistor, the threshold detection output is coupled to the third logic input, and the threshold detection circuit is configured to provide a threshold signal at the threshold detection output responsive to a current through the second transistor crossing a current threshold; and
a slope compensation circuit coupled between the second comparator input and the output voltage terminal, wherein the slope compensation circuit includes:
a capacitor coupled between the second comparator input and a compensation terminal;
a resistor coupled between the compensation terminal and the output voltage terminal; and
a third transistor having a third control terminal, in which the third transistor is coupled between the compensation terminal and the ground terminal, and the third control terminal is coupled to the second driver output.
2. The circuit of claim 1 , further comprising:
a capacitor coupled between the second comparator input and the output voltage terminal; and
a resistor coupled between the switching terminal and the second comparator input.
3. The circuit of claim 2 , wherein the capacitor is a first capacitor, and the circuit further comprises a second capacitor coupled between the first comparator input and the ground terminal.
4. The circuit of claim 1 , further comprising an inductor coupled between the switching terminal and the output voltage terminal.
5. The circuit of claim 4 , further comprising:
a capacitor coupled between the output voltage terminal and the ground terminal; and
a resistor coupled between the output voltage terminal and the ground terminal.
6. The circuit of claim 1 , wherein the current threshold is zero.
7. The circuit of claim 1 , wherein the logic circuit includes a state machine configured to control turning the first transistor on or off and turning the second transistor on or off.
8. The circuit of claim 7 , wherein the logic circuit includes an edge detection circuit having an edge detection input and an edge detection output, wherein the edge detection input is coupled to the clock terminal, and the edge detection output is coupled to the state machine.
9. The circuit of claim 7 , wherein the state machine has three states.
10. The circuit of claim 7 , wherein the state machine is configured to turn off the first and second transistors responsive to the threshold signal.
11. A voltage regulator circuit, comprising:
an amplifier having an amplifier output and first and second amplifier inputs, wherein the first amplifier input is coupled to a reference voltage terminal, and the second amplifier input is coupled to an output voltage terminal;
a comparator having a comparator output and first and second comparator inputs, wherein the first comparator input is coupled to the amplifier output, and the second comparator input is coupled to a switching terminal;
a state machine having first, second and third state inputs and first and second state outputs, wherein the first state input is coupled to the comparator output, and the second state input is coupled to a clock terminal;
a driver circuit having first and second driver inputs and first and second driver outputs, wherein the first driver input is coupled to the first state output, and the second driver input is coupled to the second state output;
a first transistor coupled between a supply voltage terminal and the switching terminal and having a first control terminal, wherein the first control terminal is coupled to the first driver output;
a second transistor coupled between the switching terminal and a ground terminal and having a second control terminal, in which the second control terminal is coupled to the second driver output; and
a slope compensation circuit coupled between the second comparator input and the output voltage terminal, wherein the slope compensation circuit includes:
a capacitor coupled between the second comparator input and a compensation terminal;
a resistor coupled between the compensation terminal and the output voltage terminal; and
a third transistor having a third control terminal, in which the third transistor is coupled between the compensation terminal and the ground terminal, and the third control terminal is coupled to the second driver output.
12. The voltage regulator circuit of claim 11 , further comprising a threshold detection circuit having a threshold detection input and a threshold detection output, wherein the threshold detection input is coupled to the second transistor, the threshold detection output is coupled to the third state input, and the threshold detection circuit is configured to provide a threshold signal at the threshold detection output responsive to a current through the second transistor crossing a current threshold.
13. The voltage regulator circuit of claim 12 , further comprising an inductor coupled between the switching terminal and the output voltage terminal.
14. The voltage regulator circuit of claim 12 , wherein the state machine is configured to turn off the first and second transistors responsive to the threshold signal.
15. The voltage regulator circuit of claim 12 , further comprising:
a capacitor coupled between the output voltage terminal and the ground terminal; and
a resistor coupled between the output voltage terminal and the ground terminal.
16. The voltage regulator circuit of claim 11 , wherein the state machine has three states.
17. The voltage regulator circuit of claim 11 , wherein the state machine includes an edge detection circuit having an edge detection input and an edge detection output, wherein the edge detection input is coupled to the clock terminal, and the edge detection output is coupled to the state machine.