IP Library › Granted Patent US 12,261,598
Granted Patent B2
US 12,261,598 · App. 18/349,246 · Granted Mar 25, 2025

Logic based ring oscillator coupling circuit

Inventors: Hyung-il Kim (Minneapolis, MN); William Moy (Minneapolis, MN)
Assignee: Regents of the University of Minnesota
H03K19/0002H03K3/0315
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,261,598
App. No.
18/349,246
Granted
Mar 25, 2025
Kind
B2
Abstract

A coupled ring oscillator circuit includes a first ring oscillator, a second ring oscillator and a coupling circuit. The first ring oscillator includes a series of delay stages, each delay stage including an inverter gate. The second ring oscillator includes a series of delay stages, each delay stage including an inverter gate. The coupling circuit includes a coupling cell having a first modified tri-state inverter connected in parallel with one of the inverter gates of the first ring oscillator, and a second modified tri-state inverter connected in parallel with one of the inverter gates of the second ring oscillator.

Claims (30)

1. A coupled ring oscillator circuit comprising:

a first ring oscillator comprising a series of delay stages, each delay stage including an inverter gate;

a second ring oscillator comprising a series of delay stages, each delay stage including an inverter gate; and

a coupling circuit including a coupling cell comprising:

a first modified tri-state inverter connected in parallel with one of the inverter gates of the first ring oscillator; and

a second modified tri-state inverter connected in parallel with one of the inverter gates of the second ring oscillator.

2. The coupled ring oscillator circuit of claim 1 , wherein:

the first modified tri-state inverter is configured to receive a first control signal and a second control signal;

the second modified tri-state inverter is configured to receive a third control signal and a fourth control signal;

the coupling cell applies a positive coupling weight to the ring oscillators when the first and second control signals match an input to the inverter gate of the second ring oscillator, and the third and fourth control signals match an input to the inverter gate of the first ring oscillator; and

the coupling cell applies a negative coupling weight to the ring oscillators when the first and second control signals match an inversion of the input to the inverter gate of the second ring oscillator, and the third and fourth control signals match an inversion of the input to the inverter gate of the first ring oscillator.

3. The coupled ring oscillator circuit of claim 2 , wherein the coupling cell does not apply a weight to the ring oscillators when the first and second control signals deactivate the first modified tri-state inverter, and the third and fourth control signals deactivate the second modified tri-state inverter.

4. The coupled ring oscillator circuit of claim 2 , wherein:

the first and second control signals are generated by the second ring oscillator; and

the third and the fourth control signals are generated by the first ring oscillator.

5. A coupled ring oscillator circuit comprising:

a first ring oscillator comprising a series of first delay stages, each first delay stage including an inverter gate;

a second ring oscillator comprising a series of second delay stages, each second delay stage including an inverter gate; and

a coupling circuit comprising a coupling cell for each pair of the first and second delay stages, each coupling cell comprising:

a first modified tri-state inverter connected in parallel with the inverter gate of the first delay stage; and

a second modified tri-state inverter connected in parallel with the inverter gate of the second delay stage.

6. The coupled ring oscillator circuit of claim 5 , wherein in each coupling cell:

the first modified tri-state inverter is configured to receive a first control signal and a second control signal;

the second modified tri-state inverter is configured to receive a third control signal and a fourth control signal;

the coupling cell applies a positive coupling weight to the connected ring oscillators when the first and second control signals match an input to the inverter gate of the second delay stage, and the third and fourth control signals match an input to the inverter gate of the first delay stage; and

the coupling cell applies a negative coupling weight to the connected ring oscillators when the first and second control signals match an inversion of the input to the inverter gate of the second delay stage, and the third and fourth control signals match an inversion of the input to the inverter gate of the first delay stage.

7. The coupled ring oscillator circuit of claim 6 , wherein each coupling cell does not apply a weight to the connected ring oscillators when the first and second control signals deactivate the first modified tri-state inverter, and the third and fourth control signals deactivate the second modified tri-state inverter.

8. The coupled ring oscillator circuit of claim 6 , wherein:

the first and second control signals are generated by the second ring oscillator; and

the third and the fourth control signals are generated by the first ring oscillator.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 8, 2023
From: KIM, HYUNG-IL; MOY, WILLIAM
To: REGENTS OF THE UNIVERSITY OF MINNESOTA
Reel/Frame 064518/0393 →
Continuity (3)
Provisional Application 63429189 · Dec 1, 2022
Provisional Application 63389723 · Jul 15, 2022
Related Publication 20240022251A1 · Jan 18, 2024
References Cited (17)
US 11545963B1 · Zick · 2023 [cited by applicant]
US 20110090015A1 · Sumita · 2011 [cited by examiner]
US 20210152125A1 · Chou et al. · 2021 [cited by applicant]
US 20210312298A1 · Kim et al. · 2021 [cited by applicant]
US 20230132603A1 · Kim et al. · 2023 [cited by applicant]
US 20240029779A1 · Kuzmenka · 2024 [cited by examiner]
Yamaoka, M. “A 20k-Spin Ising Chip to Solve Combinatorial Optimization Problems With CMOS Annealing” IEEE Journal of Solid-State Circuits, vol. 51, No. 1, Jan. 2016, 7pgs. [cited by applicant]
M. Johnson, et al., “Quantum Annealing with Manufactured Spins,” Nature, vol. 473, pp. 194-198, 2011. [cited by applicant]
M. Yamaoka, C. Yoshimura, M. Hayashi, T. Okuyama, H. Aoki and H. Mizuno, “A 20k-Spin Ising Chip to Solve Combinatorial Optimization Problems With CMOS Annealing,” in IEEE Journal of Solid-State Circuits, vol. 51, No. 1,… [cited by applicant]
T. Takemoto, M. Hayashi, C. Yoshimura and M. Yamaoka, “2.6 A 2 −30k-Spin Multichip Scalable Annealing Processor Based on a Processing-In-Memory Approach for Solving Large-Scale Combinatorial Optimization Problems,” 2019… [cited by applicant]
A. Lucas, “Ising Formulations of Many NP Problems,” Front. Phys., vol. 2, No. 5, pp. 1-15, 2014. [cited by applicant]
M. X., Goemans, et al., “Improved Approximation Algorithms for Maximum Cut and Satisfiability Problems Using Semidefinite Programming,” JACM, vol. 42, No. 6, pp. 1115-1145, 1995. [cited by applicant]
I. Ahmed, et al., “A Probabilistic Self-annealing Compute Fabric based on 560 Hexagonally Coupled Ring Oscillators for Solving Combinatorial Optimization Problems,” 2020 IEEE, Dept. of ECE, University of Minnesota, Minn… [cited by applicant]
I. Ahmed, et al., “A Probabilistic Compute Fabric Based on Coupled Ring Oscillators for Solving Combinatorial Optimization Problems,” IEEE Journal of Solid-State Circuits, 2021 IEEE, 11 pgs. [cited by applicant]
U.S. Appl. No. 17/213,396, filed Mar. 26, 2021, entitled “Probabilistic Compute Engine Using Coupled Ring Oscillators”, 26 pages. [cited by applicant]
J. Chou, S. Bramhavar, S. Ghosh, et al., “Analog Coupled Oscillator Based Weighted Ising Machine”, Scientific Reports, 2019, 10 pages. [cited by applicant]
P. Xiao, “Optoelectronics for refrigeration and analog circuits for combinatorial optimization” Electrical Engineering and Computer Sciences, University of California at Berkeley, Technical Report No. UCB/EECS-2019-74, … [cited by applicant]