IP Library › Granted Patent US 12,266,567
Granted Patent B2
US 12,266,567 · App. 17/731,053 · Granted Apr 1, 2025

Method of forming a barrier layer in an interconnect structure of semiconductor device

Inventors: Bo-Jhih Shen (Tainan, TW); Yi-Wei Chiu (Kaohsiung, TW); Hung Jui Chang (Shetou Shiang, TW)
Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
H01L21/76843H01L21/02063H01L21/2855H01L21/76804H01L21/76811H01L21/76813H01L21/76814H01L21/76853H01L23/5226
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,266,567
App. No.
17/731,053
Granted
Apr 1, 2025
Kind
B2
Abstract

Implementations of the present disclosure provide methods for preventing contact damage or oxidation after via/trench opening formation. In one example, the method includes forming an opening in a structure on the substrate to expose a portion of a surface of an electrically conductive feature, and bombarding a surface of a mask layer of the structure using energy species formed from a plasma to release reactive species from the mask layer, wherein the released reactive species form a barrier layer on the exposed surface of the electrically conductive feature.

Claims (32)

1. A method of manufacturing a semiconductor structure, the method comprising:

forming an opening through a mask layer, the opening exposing a surface of a conductive feature;

after forming the opening, forming a plasma; and

after forming the opening, bombarding a surface of the mask layer using energy species from the plasma to release reactive species from the mask layer and using the energy species from the plasma to remove residues or by-products on the surface of the conductive feature.

2. The method of claim 1 , wherein the energy species comprise a first species from an inert gas and a second species from an etchant gas.

3. The method of claim 2 , wherein the first species release the reactive species from the mask layer.

4. The method of claim 2 , wherein the second species removes the residues or by-products on the surface of the conductive feature.

5. The method of claim 1 , wherein the reactive species form a barrier layer on the surface of the conductive feature.

6. The method of claim 5 , further comprising performing a wet cleaning process, wherein a portion of the barrier layer remains after the wet cleaning process.

7. The method of claim 6 , further comprising filling the opening with a conductive material, wherein the portion of the barrier layer is covered by the conductive material.

8. A method of manufacturing a semiconductor structure, the method comprising:

removing residues on a portion of a conductive feature by reacting energy species with the residues, wherein the portion of the conductive feature is exposed through an opening in a dielectric layer on the conductive feature; and

forming a barrier layer on the portion of the conductive feature, forming the barrier layer comprising bombarding a mask layer on the dielectric layer, bombarding the mask layer forming reactive species, the reactive species being deposited on the portion of the conductive feature, wherein removing the residues and forming the barrier layer are performed simultaneously.

9. The method of claim 8 , wherein the residues comprise fluorine.

10. The method of claim 8 , wherein the reactive species comprise a transition metal.

11. The method of claim 8 , wherein the energy species are formed by ionizing an etchant gas.

12. The method of claim 8 , wherein bombarding the mask layer comprises ionizing an inert gas and applying a bias power.

13. The method of claim 12 , wherein the bias power is applied at a radio frequency range of 10 MHz to 30 MHz.

14. A method of manufacturing a semiconductor structure, the method comprising:

forming an etch stop layer (ESL) over respective top surfaces of a conductive feature and a first dielectric layer;

depositing a second dielectric layer over the first dielectric layer;

forming a transition metal compound over the second dielectric layer;

exposing a top surface of the conductive feature by forming an opening through the transition metal compound and the second dielectric layer;

removing residues from the top surface of the conductive feature with energy species from a plasma;

forming a conductive barrier layer on the top surface of the conductive feature and on a sidewall of the opening, wherein forming the conductive barrier layer comprises releasing reactive species from the transition metal compound by bombarding the transition metal compound with the energy species from the plasma, wherein the reactive species released from the transition metal compound reacts with a species in the plasma to form the conductive barrier layer; and

filling the opening with a conductive material.

15. The method of claim 14 , wherein the opening has a concave bottom after forming the conductive barrier layer.

16. The method of claim 14 , wherein the opening has a convex bottom after forming the conductive barrier layer.

17. The method of claim 14 , further comprising trimming the second dielectric layer, wherein trimming the second dielectric layer changes a rough profile of the opening to a smooth and rounded profile.

18. The method of claim 14 , wherein the reactive species comprise titanium and nitrogen.

19. The method of claim 14 , further comprising performing a wet cleaning process, wherein the wet cleaning process removes a portion of the conductive barrier layer on a bottom of the opening, wherein the wet cleaning process removes a majority of the conductive barrier layer on the sidewall of the opening.

20. The method of claim 5 , wherein the barrier layer is conductive.

Continuity (4)
Continuation 16787891 · Feb 11, 2020
Division 15653368 · Jul 18, 2017
Provisional Application 62508155 · May 18, 2017
Related Publication 20220254682A1 · Aug 11, 2022
References Cited (13)
US 6911124B2 · Tang et al. · 2005 [cited by applicant]
US 7968506B2 · Chou et al. · 2011 [cited by applicant]
US 9245789B2 · Okamoto et al. · 2016 [cited by applicant]
US 10566232B2 · Shen · 2020 [cited by examiner]
US 20050233582A1 · Friedemann · 2005 [cited by examiner]
US 20070126121A1 · Shue et al. · 2007 [cited by applicant]
US 20100055897A1 · Chou · 2010 [cited by examiner]
US 20150262864A1 · Okamoto · 2015 [cited by examiner]
US 20170053865A1 · Lin et al. · 2017 [cited by applicant]
US 20180294162A1 · Xie · 2018 [cited by examiner]
JP 2002043246A · 2002 [cited by applicant]
JP 2015073081A · 2015 [cited by applicant]
JP 6056868B2 · 2017 [cited by applicant]