IP Library Granted Patent US 12,278,569
Granted Patent B2
US 12,278,569 · App. 18/226,316 · Granted Apr 15, 2025

Systems and methods for inverter and DC/DC converter operation

Inventors: Qinghong Yu (Carlisle, MA); Jing Huang (Andover, MA)
Assignee: SCHNEIDER ELECTRIC IT CORPORATION
H02M3/33576H02J9/062
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Quick Facts
Patent No.
US 12,278,569
App. No.
18/226,316
Granted
Apr 15, 2025
Kind
B2
Abstract

Examples of the disclosure include a power system comprising a power-system output configured to be coupled to, and provide an output AC waveform to, one or more loads, a positive DC bus, a negative DC bus, an inverter coupled to the positive DC bus and the negative DC bus, the inverter including an inverter output coupled to the power-system output, and a DC/DC converter coupled between the inverter output and at least one of the positive DC bus or the negative DC bus.

Claims (49)

1. A power system comprising:

a power-system output configured to be coupled to, and provide an output AC waveform including a positive cycle and a negative cycle to, one or more loads;

a positive DC bus;

a negative DC bus;

an inverter coupled to the positive DC bus and the negative DC bus, the inverter including an inverter output coupled to the power-system output; and

a DC/DC converter coupled between the inverter output and at least one of the positive DC bus or the negative DC bus,

wherein the inverter is configured to:

provide, during the positive cycle, positive-voltage power to the DC/DC converter; and

provide, during the negative cycle, negative-voltage power to the DC/DC converter.

2. The power system of claim 1 , wherein the positive DC bus and the negative DC bus are configured to be coupled to at least one energy-storage device.

3. The power system of claim 2 , wherein the DC/DC converter is configured to execute one or both of:

providing, via at least one of the positive DC bus or the negative DC bus, output power to the at least one energy-storage device, and

receiving, via at least one of the positive DC bus or the negative DC bus, input power from the at least one energy-storage device.

4. The power system of claim 1 , wherein the inverter includes a plurality of switches coupled between the inverter output and the power-system output.

5. The power system of claim 4 , wherein the inverter includes a snubber capacitor coupled in parallel with the plurality of switches.

6. The power system of claim 4 , wherein the inverter further comprises:

a first set of one or more inverter switches coupled to a positive-DC-power source at a first connection and to the plurality of switches at a second connection, and

a second set of one or more inverter switches coupled to a negative-DC-power source at a third connection and to the plurality of switches at a fourth connection.

7. The power system of claim 1 , wherein the inverter further comprises:

a first set of one or more inverter switches coupled to a positive-DC-power source at a first connection and to the inverter output at a second connection, and

a second set of one or more inverter switches coupled to a negative-DC-power source at a third connection and to the inverter output at a fourth connection.

8. The power system of claim 1 , wherein the inverter further comprises a set of one or more inverter switches coupled to a power source at a first connection and to the inverter output at a second connection.

9. The power system of claim 8 , wherein the power source includes a capacitor, and wherein the set of one or more inverter switches is coupled in parallel with the capacitor.

10. A non-transitory computer-readable medium storing thereon sequences of computer-executable instructions for controlling a power system including a positive DC bus, a negative DC bus, an output, an inverter including an inverter output, and a DC/DC converter coupled between the inverter output and at least one of the positive DC bus or the negative DC bus, the sequences of computer-executable instructions including instructions that instruct at least one processor to:

control the inverter to provide an output AC waveform to the output;

control, during a positive portion of the output AC waveform, the inverter to couple the positive DC bus to the DC/DC converter; and

control, during the positive portion of the output AC waveform, the inverter to isolate the negative DC bus from the DC/DC converter.

11. The non-transitory computer-readable medium of claim 10 , wherein the instructions further instruct the at least one processor to:

control, during a negative portion of the output AC waveform, the inverter to couple the negative DC bus to the DC/DC converter; and

control, during the negative portion of the output AC waveform, the inverter to isolate the positive DC bus from the DC/DC converter.

12. The non-transitory computer-readable medium of claim 11 , wherein the instructions further instruct the at least one processor to control, during the negative portion of the output AC waveform, the DC/DC converter to provide power derived from the negative DC bus to at least one energy-storage device.

13. The non-transitory computer-readable medium of claim 10 , wherein the instructions further instruct the at least one processor to control, during the positive portion of the output AC waveform, the DC/DC converter to provide power derived from the positive DC bus to at least one energy-storage device.

14. The non-transitory computer-readable medium of claim 10 , wherein the instructions further instruct the at least one processor to control, during the positive portion of the output AC waveform, the inverter to:

draw power from the positive DC bus;

provide a first portion of the drawn power to the output; and

provide a second portion of the drawn power to the DC/DC converter.

15. The non-transitory computer-readable medium of claim 10 , wherein the instructions further instruct the at least one processor to control, during a negative portion of the output AC waveform, the inverter to:

draw power from the negative DC bus;

provide a first portion of the drawn power to the output; and

provide a second portion of the drawn power to the DC/DC converter.

16. A method of controlling a power system including a positive DC bus, a negative DC bus, an output, an inverter having an inverter output, and a DC/DC converter coupled between the inverter output and at least one of the positive DC bus or the negative DC bus, the method comprising:

controlling the inverter to provide an output AC waveform to the output;

controlling, during a positive portion of the output AC waveform, the inverter to couple the positive DC bus to the DC/DC converter; and

controlling, during the positive portion of the output AC waveform, the inverter to isolate the negative DC bus from the DC/DC converter.

17. The method of claim 16 , further comprising:

controlling, during a negative portion of the output AC waveform, the inverter to couple the negative DC bus to the DC/DC converter; and

controlling, during the negative portion of the output AC waveform, the inverter to isolate the positive DC bus from the DC/DC converter.

18. The method of claim 17 , further comprising controlling, during the negative portion of the output AC waveform, the DC/DC converter to provide power derived from the negative DC bus to at least one energy-storage device.

19. The method of claim 16 , further comprising controlling, during the positive portion of the output AC waveform, the DC/DC converter to provide power derived from the positive DC bus to at least one energy-storage device.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 1, 2023
From: YU, QINGHONG; HUANG, JING
To: SCHNEIDER ELECTRIC IT CORPORATION
Reel/Frame 064453/0968 →
Continuity (2)
Provisional Application 63399296 · Aug 19, 2022
Related Publication 20240063722A1 · Feb 22, 2024
References Cited (10)
US 7237634B2 · Severinsky et al. · 2007 [cited by applicant]
US 8994217B2 · Cho et al. · 2015 [cited by applicant]
US 10562404B1 · Khaligh et al. · 2020 [cited by applicant]
US 10574084B2 · Ghosh et al. · 2020 [cited by applicant]
US 10581342B2 · Zhang · 2020 [cited by examiner]
US 20210257852A1 · Toyoda · 2021 [cited by examiner]
US 20220038029A1 · Prakash et al. · 2022 [cited by applicant]
WO 2019013905A1 · 2019 [cited by applicant]
Extended European Search Report from corresponding European Application No. 23191934.1 dated Jan. 30, 2024. [cited by applicant]
Teston, S. A. et al., “ANPC Inverter with Integrated Secondary Bidirectional Dc Port for ESS Connection”, IEEE Transactions on Industry Applications, IEEE Service Center, Piscataway, NJ, US, vol. 55, No. 6, Nov. 1, 2019… [cited by applicant]