Converter output stage with bias voltage generator
A buck voltage converter is disclosed. The buck voltage generator includes a controller configured to generate one or more pulse width modulation (PWM) signals, and a plurality of serially connected switches configured to receive the PWM signals and to generate an output voltage signal at an output terminal based on the received PWM signals. The output voltage signal has an average voltage corresponding with a duty cycle of the PWM signals, a first switch of the plurality of serially connected switches has a first breakdown voltage and a second switch of the plurality of serially connected switches has a second breakdown voltage, and the first breakdown voltage is less than the second breakdown voltage.
1. A circuit comprising:
a controller configured to generate one or more control signals;
a power input terminal and an output terminal;
a high-side circuit coupled between the power input terminal and the output terminal, wherein the high-side circuit includes a first plurality of serially connected switches;
a low-side circuit coupled between the output terminal and a ground, wherein the low-side circuit includes a second plurality of serially connected switches;
wherein the first and second plurality of serially connected switches are arranged to generate an output voltage signal at the output terminal,
wherein a first voltage between the power input terminal and the output terminal is distributed across the first plurality of serially connected switches;
wherein a second voltage between the output terminal and the ground is distributed across the second plurality of serially connected switches;
wherein the first plurality of serially connected switches are P-type switches;
wherein the second plurality of serially connected switches are N-type switches;
wherein a first switch of the first plurality of serially connected switches is a first type of switch;
wherein a second switch of the first plurality of serially connected switches is a second type of switch;
wherein the first switch of the first plurality of serially connected switches is characterized as having a first breakdown voltage;
wherein the second switch of the first plurality of serially connected switches is characterized as having a second breakdown voltage; and
wherein the second switch of the first plurality of serially connected switches is arranged to receive a first bias voltage, wherein the first bias voltage is fixed.
2. The circuit of claim 1 , wherein the first breakdown voltage is less than the second breakdown voltage.
3. The circuit of claim 2 , wherein the first switch of the first plurality of serially connected switches is arranged to receive a first of the one or more control signals and to selectively conduct current according to the first of the one or more control signals.
4. The circuit of claim 3 , wherein the first switch is arranged to receive an input voltage from the power input terminal and to provide current from the power input terminal to the output terminal through the second switch of the first plurality of serially connected switches.
5. The circuit of claim 4 , wherein a third switch of the first plurality of serially connected switches is connected between the second switch and the output terminal, and wherein the first switch is further configured to provide current from the power input terminal to the output terminal through the third switch.
6. The circuit of claim 5 , further comprising a semiconductor substrate, wherein the controller and the first and second plurality of serially connected switches are integrated on the semiconductor substrate.
7. The circuit of claim 1 , wherein the high-side circuit and the low-side circuit are arranged to limit a maximum voltage applied to each of the first plurality of switches and each of the second plurality of switches to a fraction of a voltage at the power input terminal.
8. A method of operating a circuit, the method comprising:
generating, by a controller, one or more control signals;
providing a power input terminal and an output terminal;
providing a high-side circuit coupled between the power input terminal and the output terminal, wherein the high-side circuit includes a first plurality of serially connected switches;
providing a low-side circuit coupled between the output terminal and a ground, wherein the low-side circuit includes a second plurality of serially connected switches;
generating an output voltage signal at the output terminal,
wherein a first voltage between the power input terminal and the output terminal is distributed across the first plurality of serially connected switches;
wherein a second voltage between the output terminal and the ground is distributed across the second plurality of serially connected switches;
wherein the first plurality of serially connected switches are P-type switches;
wherein the second plurality of serially connected switches are N-type switches;
wherein a first switch of the first plurality of serially connected switches is a first type of switch;
wherein a second switch of the first plurality of serially connected switches is a second type of switch;
wherein the first switch of the first plurality of serially connected switches is characterized as having a first breakdown voltage;
wherein the second switch of the first plurality of serially connected switches is characterized as having a second breakdown voltage; and
wherein the second switch of the first plurality of serially connected switches is arranged to receive a first bias voltage, wherein the first bias voltage is fixed.
9. The method of claim 8 , wherein the first breakdown voltage is less than the second breakdown voltage.
10. The method of claim 9 , further comprising receiving, by the first switch of the first plurality of serially connected switches, a first of the one or more control signals and selectively conducting current according to the first of the one or more control signals.
11. The method of claim 10 , further comprising receiving, by the first switch of the first plurality of serially connected switches, an input voltage from the power input terminal and providing current from the power input terminal to the output terminal through the second switch of the first plurality of serially connected switches.
12. The method of claim 11 , wherein a third switch of the first plurality of serially connected switches is connected between the second switch of the first plurality of serially connected switches and the output terminal.
13. The method of claim 12 , further comprising providing, by the first switch, current from the power input terminal to the output terminal through the third switch.
14. The method of claim 13 , further comprising providing a semiconductor substrate, wherein the controller and the first and second plurality of serially connected switches are integrated on the semiconductor substrate.
15. The method of claim 8 , wherein the high-side circuit and the low-side circuit are arranged to limit a maximum voltage applied to each of the first plurality of switches and each of the second plurality of switches to a fraction of a voltage at the power input terminal.
16. A circuit comprising:
a controller configured to generate one or more control signals;
a power input terminal and an output terminal;
a high-side circuit coupled between the power input terminal and the output terminal, wherein the high-side circuit includes a first plurality of serially connected switches;
a low-side circuit coupled between the output terminal and a ground, wherein the low-side circuit includes a second plurality of serially connected switches;
wherein the first and second plurality of serially connected switches are arranged to generate an output voltage signal at the output terminal,
wherein a first voltage between the power input terminal and the output terminal is distributed across the first plurality of serially connected switches;
wherein a second voltage between the output terminal and the ground is distributed across the second plurality of serially connected switches;
wherein the first plurality of serially connected switches are P-type switches;
wherein the second plurality of serially connected switches are N-type switches;
wherein a first switch of the first plurality of serially connected switches is a first type of switch;
wherein a second switch of the first plurality of serially connected switches is a second type of switch;
wherein the first switch of the first plurality of serially connected switches is characterized as having a first breakdown voltage; and
wherein the second switch of the first plurality of serially connected switches is characterized as having a second breakdown voltage.
17. The circuit of claim 16 , wherein the second switch of the first plurality of serially connected switches is arranged to receive a first bias voltage, wherein the first bias voltage is fixed.
18. The circuit of claim 17 , wherein the first breakdown voltage is less than the second breakdown voltage.
19. The circuit of claim 16 , wherein the high-side circuit and the low-side circuit are arranged to limit a maximum voltage applied to each of the first plurality of switches and each of the second plurality of switches to a fraction of a voltage at the power input terminal.