IP Library › Granted Patent US 12,288,505
Granted Patent B2
US 12,288,505 · App. 17/756,465 · Granted Apr 29, 2025

Driving circuit, display panel, and driving method thereof

Inventor: Wenxue Huo (Guangdong, CN)
Assignee: TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
G09G3/32G09G2320/0233G09G2320/0633
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Quick Facts
Patent No.
US 12,288,505
App. No.
17/756,465
Granted
Apr 29, 2025
Kind
B2
Abstract

A driving circuit, a display panel, and a driving method thereof are disclosed. The driving circuit includes a light-emitting module, a data signal writing module, and a control module. The light-emitting module emits light under a driving current. The data signal writing module is connected to the light-emitting module and configured to control a magnitude of the driving current. The control module is electrically connected to the data signal writing module and the light-emitting module. The control module is configured to control a light-emitting time of the light-emitting module under a control of a light-emitting time control signal.

Claims (45)

1. A driving circuit comprising:

a light-emitting module, wherein the light-emitting module emits light under a driving of a driving current;

a data signal writing module configured to receive a first data signal and a first scan signal, wherein the data signal writing module is connected to the light-emitting module and is configured to control a magnitude of the driving current; and

a control module configured to receive a second data signal, a light-emitting time control signal, a second scan signal, and a third scan signal and electrically connected to the data signal writing module and the light-emitting module, wherein the control module is configured to control a light-emitting time of the light-emitting module under a control of the light-emitting time control signal;

wherein the light-emitting module comprises a first transistor and a light-emitting device, a first electrode of the first transistor is electrically connected to a first power supply terminal, a gate of the first transistor is electrically connected to a first node, and a second electrode of the first transistor is electrically connected to a second node;

wherein an anode of the light-emitting device is electrically connected to the second node, and a cathode of the light-emitting device is electrically connected to a second power supply terminal;

wherein the data signal writing module comprises a second transistor and a first capacitor, a gate of the second transistor is configured to receive the first scan signal, the first electrode of the second transistor is configured to receive the first data signal, a second electrode of the second transistor is connected to the first node; one end of the first capacitor is electrically connected to the first node, and another end of the first capacitor is electrically connected to the second node;

wherein the control module comprises a second capacitor, a third transistor, a fourth transistor, and a fifth transistor, one end of the second capacitor is configured to receive the light-emitting time control signal, and another end of the second capacitor is electrically connected to the third node;

wherein a gate of the third transistor is configured to receive the second scan signal, a first electrode of the third transistor is electrically connected to the third node, and a second electrode of the third transistor is electrically connected between the data signal writing module and the light-emitting module;

wherein a gate of the fourth transistor is electrically connected to the third node, a first electrode of the fourth transistor is electrically connected to the fourth node, and a second electrode of the fourth transistor is electrically connected to a second electrode of the third transistor is electrically connected;

wherein a gate of the fifth transistor is configured to receive the third scan signal, a first electrode of the fifth transistor is configured to receive the second data signal, and a second electrode of the fifth transistor is electrically connected to the fourth node;

wherein the first electrode of the second transistor and the first electrode of the fifth transistor are electrically connected to a fifth node, and the first data signal and the second data signal are a same signal.

2. The driving circuit of claim 1 , wherein the light-emitting module further comprises a threshold voltage detection sub-module, the threshold voltage detection sub-module is configured to receive a fourth scan signal and a third data signal, and the threshold voltage detection sub-module is configured to detect a threshold voltage of the first transistor and compensate for a data voltage corresponding to the first data signal.

3. The driving circuit of claim 2 , wherein the threshold voltage detection sub-module comprises a sixth transistor, a gate of the sixth transistor is connected to the fourth scan signal, a first electrode of the sixth transistor is configured to receives the third data signal, and a second electrode of the sixth transistor is electrically connected to the second node.

4. The driving circuit of claim 1 , wherein the first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor are transistors of a same type.

5. A display panel comprising a plurality of pixel units arranged in an array, the pixel units comprising a driving circuit, the driving circuit comprising:

a light-emitting module, wherein the light-emitting module emits light under a driving of a driving current;

a data signal writing module configured to receive a first data signal and a first scan signal, wherein the data signal writing module is connected to the light-emitting module and is configured to control a magnitude of the driving current; and

a control module configured to receive a second data signal, a light-emitting time control signal, a second scan signal, and a third scan signal and electrically connected to the data signal writing module and the light-emitting module, wherein the control module is configured to control a light-emitting time of the light-emitting module under a control of the light-emitting time control signal;

wherein the light-emitting module comprises a first transistor and a light-emitting device, a first electrode of the first transistor is electrically connected to a first power supply terminal, a gate of the first transistor is electrically connected to a first node, and a second electrode of the first transistor is electrically connected to a second node;

wherein an anode of the light-emitting device is electrically connected to the second node, and a cathode of the light-emitting device is electrically connected to a second power supply terminal;

wherein the data signal writing module comprises a second transistor and a first capacitor, a gate of the second transistor is configured to receive the first scan signal, the first electrode of the second transistor is configured to receive the first data signal, a second electrode of the second transistor is connected to the first node; one end of the first capacitor is electrically connected to the first node, and another end of the first capacitor is electrically connected to the second node;

wherein the control module comprises a second capacitor, a third transistor, a fourth transistor, and a fifth transistor, one end of the second capacitor is configured to receive the light-emitting time control signal, and another end of the second capacitor is electrically connected to the third node;

wherein a gate of the third transistor is configured to receive the second scan signal, a first electrode of the third transistor is electrically connected to the third node, and a second electrode of the third transistor is electrically connected between the data signal writing module and the light-emitting module;

wherein a gate of the fourth transistor is electrically connected to the third node, a first electrode of the fourth transistor is electrically connected to the fourth node, and a second electrode of the fourth transistor is electrically connected to a second electrode of the third transistor is electrically connected;

wherein a gate of the fifth transistor is configured to receive the third scan signal, a first electrode of the fifth transistor is configured to receive the second data signal, and a second electrode of the fifth transistor is electrically connected to the fourth node;

wherein the first electrode of the second transistor and the first electrode of the fifth transistor are electrically connected to a fifth node, and the first data signal and the second data signal are a same signal.

6. The display panel of claim 5 , wherein the light-emitting module further comprises a threshold voltage detection sub-module, the threshold voltage detection sub-module is configured to receive a fourth scan signal and a third data signal, and the threshold voltage detection sub-module is configured to detect a threshold voltage of the first transistor and compensate for a data voltage corresponding to the first data signal.

7. The display panel of claim 6 , wherein the threshold voltage detection sub-module comprises a sixth transistor, a gate of the sixth transistor is connected to the fourth scan signal, a first electrode of the sixth transistor is configured to receives the third data signal, and a second electrode of the sixth transistor is electrically connected to the second node.

8. The display panel of claim 5 , wherein the first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor are transistors of a same type.

9. A driving method of a display panel, the display panel comprising a plurality of pixel units arranged in an array, the pixel units comprising a driving circuit, a driving method of the driving circuit comprising:

controlling a conduction of a data signal writing module through a first data signal and a first scan signal, wherein the data signal writing module is connected to a light-emitting module and configured to control a magnitude of a driving current;

controlling a conduction of a control module through a second data signal, a light-emitting time control signal, a second scan signal, and a third scan signal, wherein the control module is electrically connected to the data signal writing module and the light-emitting module, and the control module is configured to control a light-emitting time of the light-emitting module under a control of the light-emitting time control signal; and

driving the light-emitting module to emit light by the driving current;

wherein the light-emitting module comprises a first transistor and a light-emitting device, a first electrode of the first transistor is electrically connected to a first power supply terminal, a gate of the first transistor is electrically connected to a first node, and a second electrode of the first transistor is electrically connected to a second node;

wherein an anode of the light-emitting device is electrically connected to the second node, and a cathode of the light-emitting device is electrically connected to a second power supply terminal;

wherein the data signal writing module comprises a second transistor and a first capacitor, a gate of the second transistor is configured to receive the first scan signal, the first electrode of the second transistor is configured to receive the first data signal, a second electrode of the second transistor is connected to the first node; one end of the first capacitor is electrically connected to the first node, and another end of the first capacitor is electrically connected to the second node;

wherein the control module comprises a second capacitor, a third transistor, a fourth transistor, and a fifth transistor, one end of the second capacitor is configured to receive the light-emitting time control signal, and another end of the second capacitor is electrically connected to the third node;

wherein a gate of the third transistor is configured to receive the second scan signal, a first electrode of the third transistor is electrically connected to the third node, and a second electrode of the third transistor is electrically connected between the data signal writing module and the light-emitting module;

wherein a gate of the fourth transistor is electrically connected to the third node, a first electrode of the fourth transistor is electrically connected to the fourth node, and a second electrode of the fourth transistor is electrically connected to a second electrode of the third transistor is electrically connected;

wherein a gate of the fifth transistor is configured to receive the third scan signal, a first electrode of the fifth transistor is configured to receive the second data signal, and a second electrode of the fifth transistor is electrically connected to the fourth node;

wherein the first electrode of the second transistor and the first electrode of the fifth transistor are electrically connected to a fifth node, and the first data signal and the second data signal are a same signal.

10. The driving method of the display panel of claim 9 , wherein the light-emitting module further comprises a threshold voltage detection sub-module, the threshold voltage detection sub-module is configured to receive a fourth scan signal and a third data signal, and the threshold voltage detection sub-module is configured to detect a threshold voltage of the first transistor and compensate for a data voltage corresponding to the first data signal.

11. The driving method of the display panel of claim 10 , wherein the threshold voltage detection sub-module comprises a sixth transistor, a gate of the sixth transistor is connected to the fourth scan signal, a first electrode of the sixth transistor is configured to receives the third data signal, and a second electrode of the sixth transistor is electrically connected to the second node.

12. The driving method of the display panel of claim 9 , wherein the first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor are transistors of a same type.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 26, 2022
From: HUO, WENXUE
To: TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
Reel/Frame 060200/0478 →
Priority Claims (1)
CN 202210458165.8 · Apr 27, 2022 · national
Continuity (1)
Related Publication 20240169892A1 · May 23, 2024
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