IP Library › Granted Patent US 12,301,200
Granted Patent B2
US 12,301,200 · App. 17/951,672 · Granted May 13, 2025

Balun having asymmetric inductors and adjustable impedance transformation ratio

Inventors: Foad Arfaei Malekzadeh (San Diego, CA); Jorge Garcia (San Diego, CA); Jeremy Darren Dunworth (La Jolla, CA)
Assignee: QUALCOMM Incorporated
H03H7/42H03H7/0115H03H7/0153H03H7/09
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Quick Facts
Patent No.
US 12,301,200
App. No.
17/951,672
Granted
May 13, 2025
Kind
B2
Abstract

A balun circuit includes a first transformer comprising a first inductor and a second inductor, the first inductor having an electrical value different than the second inductor, a second transformer comprising a third inductor and a fourth inductor, the third inductor having an electrical value different than the fourth inductor, the first inductor connected to a positive terminal of a balanced port, the third inductor connected to a negative terminal of the balanced port, the second inductor connected to an unbalanced port and the fourth inductor connected to a node.

Claims (37)

1. A balun circuit, comprising:

a first transformer comprising a first inductor and a second inductor, the first inductor having an electrical value different than the second inductor;

a second transformer comprising a third inductor and a fourth inductor, the third inductor having an electrical value different than the fourth inductor, the first inductor connected to a positive terminal of a balanced port, the third inductor connected to a negative terminal of the balanced port, the second inductor connected to an unbalanced port and the fourth inductor connected to a node;

a first capacitance connected across the first inductor;

a second capacitance connected across the third inductor;

a third capacitance connected between the unbalanced port and system ground;

a fourth capacitance connected between the node and system ground;

a first center tap between the second inductor and the fourth inductor; and

a fifth capacitance connected between the first center tap and system ground.

2. The balun circuit of claim 1 , further comprising a second center tap between the first inductor and the third inductor, the second center tap configured to accept a common mode bias voltage.

3. The balun circuit of claim 1 , wherein the first through fourth capacitances are adjustable.

4. The balun circuit of claim 3 , further comprising diodes coupled to the fourth inductor to provide electrostatic discharge (ESD) protection.

5. The balun circuit of claim 1 , further comprising diodes coupled to the fourth inductor to provide electrostatic discharge (ESD) protection.

6. The balun circuit of claim 1 , wherein the balun circuit provides an adjustable impedance transformation ratio.

7. The balun circuit of claim 6 , wherein the balun circuit provides a variable impedance transformation ratio that can be adjusted during calibration.

8. The balun circuit of claim 6 , wherein the balun circuit provides a tunable impedance transformation ratio that can be adjusted during operation.

9. The balun circuit of claim 1 , wherein the first and second transformers provide an impedance transformation and one or more of the first capacitance, the second capacitance, the third capacitance, the fourth capacitance, and the fifth capacitance are configured to increase an electrical length of the first inductor, second inductor, third inductor and fourth inductor such that a phase transfer function of the first and second transformers is less than a quarter wavelength.

10. A method for signal conversion, comprising:

adjusting the impedance transformation ratio (ITR) of a balun circuit by selecting capacitance values, the balun circuit comprising two asymmetric transformers, and the capacitance values being for capacitors coupled to a balanced node or an unbalanced node of the balun circuit; and

converting a signal between balanced and unbalanced using the balun circuit,

wherein a selected impedance transformation ratio (ITR) provides a non-quarter wavelength impedance transformation.

11. The method of claim 10 , further comprising providing a common mode bias voltage to a node on a balanced side of the balun circuit coupling the two asymmetric transformers together.

12. The method of claim 10 , wherein the selecting capacitance values comprises selecting variable capacitance values.

13. The method of claim 10 , wherein the selecting capacitance values comprises selecting tunable capacitance values.

14. The method of claim 10 , further comprising providing a tunable impedance transformation ratio that can be adjusted during operation.

15. The method of claim 10 , further comprising providing electrostatic discharge (ESD) protection.

16. The method of claim 10 , further comprising providing a variable impedance transformation ratio that can be adjusted during calibration.

17. A balun circuit, comprising:

a pair of asymmetric transformers coupled together; and

a pair of capacitors respectively directly connected across inductors on a balanced side of the asymmetric transformers,

wherein inductors on an unbalanced side of the pair of asymmetric transformers have approximately equal inductance.

18. The balun circuit of claim 17 , further comprising another capacitor coupled to a node between the pair of asymmetric transformers on the unbalanced side and ground.

19. The balun circuit of claim 18 , wherein the pair of asymmetric transformers, the pair of capacitors respectively directly connected across the inductors on the balanced side of the pair of asymmetric transformers, and the another capacitor coupled to a node between the pair of asymmetric transformers on the unbalanced side and ground are configured to provide an adjustable impedance transformation ratio.

20. The balun circuit of claim 17 , further comprising diodes coupled to the unbalanced side of the pair of asymmetric transformers to provide electrostatic discharge (ESD) protection.

21. The balun circuit of claim 17 , wherein the balun circuit provides a variable impedance transformation ratio that can be adjusted during calibration.

22. The balun circuit of claim 17 , wherein the balun circuit provides a tunable impedance transformation ratio that can be adjusted during operation.

23. The balun circuit of claim 17 , further comprising a node between the inductors on the balanced side of the pair of asymmetric transformers, the node configured to accept a common mode bias voltage.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 11, 2022
From: MALEKZADEH, FOAD ARFAEI; GARCIA, JORGE; DUNWORTH, JEREMY DARREN
To: QUALCOMM INCORPORATED
Reel/Frame 061732/0033 →
Continuity (1)
Related Publication 20240106407A1 · Mar 28, 2024
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