IP Library › Granted Patent US 12,302,643
Granted Patent B2
US 12,302,643 · App. 17/572,437 · Granted May 13, 2025

Backend electrostatic discharge diode apparatus and method of fabricating the same

Inventors: Prashant Majhi (San Jose, CA); Ilya Karpov (Portland, OR); Brian Doyle (Portland, OR); Ravi Pillarisetty (Portland, OR); Abhishek Sharma (Hillsboro, OR)
Assignee: Intel Corporation
H10D89/611H10D8/422
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Quick Facts
Patent No.
US 12,302,643
App. No.
17/572,437
Granted
May 13, 2025
Kind
B2
Abstract

A backend electrostatic discharge (ESD) diode device structure is presented comprising: a first structure comprising a first material, wherein the first material includes metal; a second structure adjacent to the first structure, wherein the second structure comprises a second material, wherein the second material includes a semiconductor or an oxide; and a third structure adjacent to the second structure, wherein the third structure comprises the first material, wherein the second structure is between the first and third structures.

Claims (40)

1. An integrated circuit (IC) comprising:

a transistor within a frontend region of the IC; and

a diode within a backend region of the IC, wherein the diode is within a circuit coupled to the transistor, and wherein the diode comprises:

a first terminal comprising a metal;

a second terminal comprising a metal; and

an insulator or semiconductor material structure between the first and second terminals.

2. The IC of claim 1 , wherein the circuit is an electrostatic discharge (ESD) protection circuit and the diode is one of one or more diode structures within the ESD protection circuit.

3. The IC of claim 2 , wherein the first terminal is coupled to a supply rail to which the transistor is also coupled and wherein the diode structure is to become forward biased upon a voltage surge between the supply rail and another circuit node to which both the second terminal and the transistor are coupled.

4. The IC of claim 3 , wherein the diode structure has a turn on voltage greater than that of the transistor.

5. The IC of claim 1 , wherein the insulator or semiconductor material structure comprises Mg, Al, Si, Ga, Ge, O, Hf, Ti, Ta, Zr, W, or Ni.

6. The IC of claim 5 , wherein the insulator or semiconductor material structure comprises metal and oxygen.

7. The IC of claim 6 , wherein the insulator or semiconductor material structure comprises HfOx, TiOx, TaOx, NiOx, ZrOx, or WOx.

8. The IC of claim 1 , wherein the first terminal or second terminal comprises Ru, Ti, Ta, Al, N, W, Ir, Si, C, or Mo.

9. The IC of claim 1 , wherein the first terminal or second terminal comprises TiN, TaN, TiAlN, TiSiN, TaC or TaAln.

10. The IC of claim 1 , wherein the insulator or semiconductor material structure is a hetero-structure comprising a stack of insulator or semiconductors material layers.

11. The IC of claim 10 , wherein material layers of the hetero-structure are repeated two or more times.

12. An integrated circuit (IC) comprising:

a transistor within a frontend region of the IC; and

a diode within a backend region of the IC, wherein the diode is within a circuit coupled to the transistor, and wherein the diode comprises:

a first terminal comprising a metal;

a second terminal comprising a metal; and

a heterostructure of an insulating material and a semiconductor material between the first and second terminals.

13. The IC of claim 12 , wherein the heterostructure is repeated two or more times within the insulator or semiconductor material structure.

14. The IC of claim 12 , wherein the heterostructure comprises three semiconductor material layers separated by two intervening insulator layers.

15. The IC of claim 14 , wherein a first of the three semiconductor material layers is in contact with the first terminal and wherein a second of the three semiconductor material layers is in contact with the second terminal.

16. A system comprising:

a memory;

a processor coupled to the memory, the processor including:

one or more transistors positioned in a frontend of a die; and

a diode within a backend region of the processor, wherein the diode is within a circuit coupled to the transistor, and wherein the diode comprises:

a first terminal comprising a metal;

a second terminal comprising a metal; and

an insulator or semiconductor material structure between the first and second terminals.

17. The system of claim 16 , wherein:

the circuit is an electrostatic discharge (ESD) protection circuit and the diode is one of one or more diode structures within the ESD protection circuit;

the first terminal is coupled to a supply rail to which the transistor is also coupled; and

the diode is to become forward biased upon a voltage surge between the supply rail and another circuit node to which both the second terminal and the transistor are coupled.

18. The system of claim 16 , wherein the diode has a turn on voltage greater than that of the transistor.

19. The system of claim 16 , wherein the insulator or semiconductor material structure comprises metal and oxygen.

20. The system of claim 19 , wherein the insulator or semiconductor material structure comprises three semiconductor material layers separated by two intervening insulator layers.

Continuity (2)
Continuation 15940899 · Mar 29, 2018
Related Publication 20220130820A1 · Apr 28, 2022
References Cited (5)
US 11222885B2 · Majhi · 2022 [cited by examiner]
US 20070015330A1 · Li et al. · 2007 [cited by applicant]
US 20140264375A1 · Ma et al. · 2014 [cited by applicant]
Non-Final Office Action from U.S. Appl. No. 15/940,899 notified Jun. 8, 2021, 7 pgs. [cited by applicant]
Notice of Allowance from U.S. Appl. No. 15/940,899 notified Sep. 22, 2021, 5 pgs. [cited by applicant]