Communication device, communication system, and communication method
A communication device includes communication circuitry configured to transmit a serial signal group conforming to a serial peripheral interface (SPI) and transmitted from a master in synchronization with a clock to a communication partner device as a batch of data blocks within one frame period of a predetermined communication protocol, or transmit the serial signal group to the communication partner device as a plurality of data blocks divided according to a plurality of frame periods.
1. A communication device comprising:
communication circuitry configured to transmit a serial signal group conforming to a serial peripheral interface (SPI) and transmitted from a master in synchronization with a clock to a communication partner device as a batch of data blocks within one frame period of a predetermined communication protocol, or transmit the serial signal group to the communication partner device as a plurality of data blocks divided according to a plurality of frame periods;
a memory configured to store a first serial signal group conforming to the SPI and transmitted from the master in synchronization with the clock, and store a second serial signal group conforming to the SPI and transmitted from a slave in synchronization with the clock;
a packet encoder configured to convert the first serial signal group stored in the memory into a first packet of the predetermined communication protocol; and
a packet decoder configured to convert a second packet of the predetermined communication protocol received from the communication partner device into the second serial signal group,
wherein the first packet includes frequency information of the clock, polarity information, and phase information of the clock with respect to a data signal of the first serial signal group confirming to the SPI.
2. The communication device according to claim 1 , wherein the first packet includes information of a slave select signal included in the first serial signal group conforming to the SPI for selecting the communication partner device or the slave.
3. The communication device according to claim 2 , wherein the packet encoder transmits the first packet to the communication partner device or the slave selected by the slave select signal as a destination.
4. A communication device comprising:
communication circuitry configured to transmit a serial signal group conforming to a serial peripheral interface (SPI) and transmitted from a master in synchronization with a clock to a communication partner device as a batch of data blocks within one frame period of a predetermined communication protocol, or transmit the serial signal group to the communication partner device as a plurality of data blocks divided according to a plurality of frame periods;
a memory configured to store a first serial signal group conforming to the SPI and transmitted from the master in synchronization with the clock, and store a second serial signal group conforming to the SPI and transmitted from a slave in synchronization with the clock;
a packet encoder configured to convert the first serial signal group stored in the memory into a first packet of the predetermined communication protocol; and
a packet decoder configured to convert a second packet of the predetermined communication protocol received from the communication partner device into the second serial signal group,
wherein the first packet includes information indicating that the batch of data blocks is included within the one frame period, or information indicating that the plurality of data blocks divided according to the plurality of frame periods is included.
5. The communication device according to claim 4 , wherein, in a case where the first packet includes the plurality of data blocks, the first packet includes a total number of the plurality of data blocks and division position information of the data blocks.
6. The communication device according to claim 4 , wherein the first packet includes size information of the data block.
7. A communication device comprising:
communication circuitry configured to transmit a serial signal group conforming to a serial peripheral interface (SPI) and transmitted from a master in synchronization with a clock to a communication partner device as a batch of data blocks within one frame period of a predetermined communication protocol, or transmit the serial signal group to the communication partner device as a plurality of data blocks divided according to a plurality of frame periods;
a memory configured to store a first serial signal group conforming to the SPI and transmitted from the master in synchronization with the clock, and store a second serial signal group conforming to the SPI and transmitted from a slave in synchronization with the clock;
a packet encoder configured to convert the first serial signal group stored in the memory into a first packet of the predetermined communication protocol; and
a packet decoder configured to convert a second packet of the predetermined communication protocol received from the communication partner device into the second serial signal group,
wherein the first packet includes information indicating whether the data block is valid or invalid.
8. A communication device comprising:
communication circuitry configured to transmit a serial signal group conforming to a serial peripheral interface (SPI) and transmitted from a master in synchronization with a clock to a communication partner device as a batch of data blocks within one frame period of a predetermined communication protocol, or transmit the serial signal group to the communication partner device as a plurality of data blocks divided according to a plurality of frame periods;
a memory configured to store a first serial signal group conforming to the SPI and transmitted from the master in synchronization with the clock, and store a second serial signal group conforming to the SPI and transmitted from a slave in synchronization with the clock;
a packet encoder configured to convert the first serial signal group stored in the memory into a first packet of the predetermined communication protocol; and
a packet decoder configured to convert a second packet of the predetermined communication protocol received from the communication partner device into the second serial signal group,
wherein the first packet includes information indicating that the slave is reset.
9. The communication device according to claim 8 , wherein the second packet includes at least one of information indicating an operation state of the slave and interrupt information from the slave.
10. The communication device according to claim 9 , wherein the memory determines that the slave requests readout of a state of the slave and transmits an interrupt signal to the master in a case where the interrupt information is included in the second packet or in a case where the second packet itself arrives at the memory from the communication partner device.
11. A communication device comprising:
communication circuitry configured to transmit a serial signal group conforming to a serial peripheral interface (SPI) and transmitted from a master in synchronization with a clock to a communication partner device as a batch of data blocks within one frame period of a predetermined communication protocol, or transmit the serial signal group to the communication partner device as a plurality of data blocks divided according to a plurality of frame periods;
a memory configured to store a first serial signal group conforming to the SPI and transmitted from the master in synchronization with the clock, and store a second serial signal group conforming to the SPI and transmitted from a slave in synchronization with the clock;
a packet encoder configured to convert the first serial signal group stored in the memory into a first packet of the predetermined communication protocol;
a packet decoder configured to convert a second packet of the predetermined communication protocol received from the communication partner device into the second serial signal group; and
a shift register configured to sequentially store each serial signal included in the first serial signal group in the memory in synchronization with the clock, and sequentially transmit each serial signal included in the second serial signal group to the master in synchronization with the clock.
12. The communication device according to claim 11 , wherein the communication circuitry transmits the first packet at first timing defined by the predetermined communication protocol and receives the second packet at second timing defined by the predetermined communication protocol.
13. The communication device according to claim 11 , wherein the packet encoder determines that transmission of the first serial signal group from the master is completed when a slave select signal transmitted from the master transitions from a first logic level to a second logic level.
14. The communication device according to claim 11 , wherein the communication circuitry transmits and receives the first packet and the second packet to and from the communication partner device using the communication protocol according to time division duplex (TDD).
15. A communication device comprising:
communication circuitry configured to transmit a serial signal group conforming to a serial peripheral interface (SPI) and transmitted from a slave in synchronization with a clock generated on a basis of clock frequency information included in a packet from a communication partner device to the communication device as a batch of data blocks within one frame period of a predetermined communication protocol, or transmit the serial signal group to the communication partner device as a plurality of data blocks divided according to a plurality of frame periods.
16. The communication device according to claim 15 , further comprising:
a packet decoder configured to convert a first packet of a predetermined communication protocol received from the communication partner device into a first serial signal group conforming to the SPI;
a clock generator configured to generate the clock on a basis of the clock frequency information included in the first serial signal group;
a memory configured to store the first serial signal group in synchronization with the clock, and store a second serial signal group conforming to the SPI and transmitted from the slave in synchronization with the clock; and
a packet encoder configured to convert the second serial signal group stored in the memory into a second packet of the predetermined communication protocol.
17. The communication device according to claim 16 , wherein the second packet includes information indicating that a batch of data blocks transmitted within one frame period of the second serial signal group is included, or information indicating that a plurality of data blocks divided and transmitted according to a plurality of frame periods is included.
18. The communication device according to claim 16 , wherein the second packet includes information indicating whether or not the slave is in a busy state in which the slave is not able to receive the first serial signal group, and information indicating whether or not there is an error in the first serial signal group received by the slave.