Granted Patent B2

US 12,314,690 · App. 17/133,238 · Granted May 27, 2025

Inventors: Fangke Ye (Atlanta, GA); Justin Gottschlich (Santa Clara, CA); Shengtian Zhou (Palo Alto, CA); Roshni Iyer (Fremont, CA); Jesmin Jahan Tithi (San Jose, CA)

Assignee: INTEL CORPORATION

G06F8/34G06F8/60G06F8/77

Abstract

Claims (49)

1. An apparatus comprising:

interface circuitry;

machine-readable instructions;

at least one processor circuit to be programmed by the machine-readable instructions to:

analyze execution of a code snippet to determine whether the code snippet invokes an application programming interface of a test framework;

after determining that the code snippet does not invoke the application programming interface of the test framework, map the code snippet into a computer-generated vector space in memory or storage based on a first code vector of the code snippet;

compare the first code vector from the computer-generated vector space to a second code vector of reference code;

generate a semantic similarity score based on a distance between the first code vector of the code snippet and the second code vector of the reference code;

select the code snippet as input code based on the semantic similarity score;

generate at least one graphical representation of at least one of the reference code or the input code, the at least one graphical representation to identify a non-overlapping code region; and

determine a root cause of a source code error in the input code, the root cause based on the non-overlapping code region.

2. The apparatus of claim 1 , wherein the at least one graphical representation is a program-derived semantic graph.

3. The apparatus of claim 1 , wherein one or more of the at least one processor circuit is to select the code snippet as the input code based on a code similarity system.

4. The apparatus of claim 3 , wherein one or more of the at least one processor circuit is to form a code cluster, the code cluster including the reference code and code snippet.

5. The apparatus of claim 4 , wherein one or more of the at least one processor circuit is to form the code cluster based on a vector-based representation of the code snippet.

6. The apparatus of claim 1 , wherein the machine-readable instructions are to cause one or more of the at least one processor circuit to extract the code snippet from a code repository.

7. The apparatus of claim 1 , wherein one or more of the at least one processor circuit is to:

determine a type of clustering based on at least one of computational resources or data availability;

assign the code snippet to a cluster based on the type of clustering; and

select the code snippet and the reference code from the cluster.

8. At least one non-transitory computer readable medium comprising instructions to cause at least one processor circuit to at least:

analyze execution of a code snippet to determine whether the code snippet includes a test that invokes an application programming interface of a test framework, the test to identify the code snippet as reference code;

after determining that the code snippet does not include the test, map the code snippet into a computer-generated vector space in memory or storage based on a first code vector of the code snippet;

compare the first code vector from the computer-generated vector space to a second code vector of the reference code;

generate a semantic similarity score based on a distance between the first code vector of the code snippet and the second code vector of the reference code;

select the code snippet as input code based on the semantic similarity score;

detect, based on the reference code, a source code error in the input code;

detect a non-overlapping code region based on at least one graphical representation of at least one of the reference code or the input code; and

determine a root cause of the source code error based on the non-overlapping code region.

9. The at least one non-transitory computer readable medium as defined in claim 8 , wherein the instructions are to cause one or more of the at least one processor circuit to generate a program-derived semantic graph.

10. The at least one non-transitory computer readable medium as defined in claim 8 , wherein the instructions are to cause one or more of the at least one processor circuit to identify the reference code based on a code similarity system, and select the code snippet using the code similarity system.

11. The at least one non-transitory computer readable medium as defined in claim 10 , wherein the instructions are to cause one or more of the at least one processor circuit to form a code cluster, the code cluster including the reference code and the code snippet.

12. The at least one non-transitory computer readable medium as defined in claim 11 , wherein the instructions are to cause one or more of the at least one processor circuit to form the code cluster using a vector-based representation of the code snippet.

13. The at least one non-transitory computer readable medium as defined in claim 8 , wherein the instructions are to cause one or more of the at least one processor circuit to extract the code snippet from a code repository.

14. An apparatus comprising:

identifier circuitry to determine whether a code snippet invokes an application programming interface of a test framework based on execution of the code snippet;

mapper circuitry to, after a determination that the code snippet does invoke the application programming interface of the test framework, map the code snippet into a computer-generated vector space in memory or storage based on a first code vector of the code snippet;

software bug detector circuitry to select the code snippet as input code based on a semantic similarity score, the semantic similarity score based on a distance between the first code vector of the code snippet and a second code vector of reference code;

graph generator circuitry to generate at least one graphical representation of at least one of the reference code or the input code, the at least one graphical representation to identify a non-overlapping code region; and

root cause determiner circuitry to determine a root cause of a source code error in the input code, the root cause based on the non-overlapping code region.

15. The apparatus of claim 14 , wherein the at least one graphical representation is a program-derived semantic graph.

16. The apparatus of claim 14 , wherein the software bug detector circuitry is to select the code snippet as the input code based on a code similarity system.

17. The apparatus of claim 14 , including clusterer circuitry to form a code cluster, the code cluster including the reference code and the code snippet.

18. The apparatus of claim 17 , wherein the clusterer circuitry is to form the code cluster based on a vector-based representation of the code snippet.

19. The apparatus of claim 17 , wherein the clusterer circuitry is to form the code cluster based on deep neural network mapping.

20. The apparatus of claim 14 , including clusterer circuitry to:

determine a type of clustering based on at least one of computational resources or data availability; and

assign the code snippet to a cluster based on the type of clustering, the software bug detector circuitry is to select the code snippet and the reference code from the cluster.

21. The apparatus of claim 14 , including extractor circuitry to extract the code snippet from a code repository.

Assignments (1)

Continuity (1)

References Cited (61)

Cited By (2)

US 12,524,539 US 12,670,163