IP Library › Granted Patent US 12,316,218
Granted Patent B2
US 12,316,218 · App. 18/363,690 · Granted May 27, 2025

Power converter having charge pump frequency switching control mechanism

Inventor: Kun-Min Chen (Hsinchu, TW)
Assignee: ANPEC ELECTRONICS CORPORATION
H02M3/07H02M1/0025H03K17/04106H03K2217/0063
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Quick Facts
Patent No.
US 12,316,218
App. No.
18/363,690
Granted
May 27, 2025
Kind
B2
Abstract

A power converter having a charge pump frequency switching control mechanism is provided. In the power converter, frequencies of a plurality of pulse waves of a clock signal are determined, according to a level of a high-side control signal outputted to a control terminal of a high-side switch from a control circuit or a voltage of the control terminal (and a voltage of a second terminal) of the high-side switch. In the power converter, a charge pump supplies power to a high-side driver circuit at the frequencies of the clock signal, and the high-side driver circuit uses the power from the charge pump to drive the high-side switch and to pull up the voltage of the control terminal of the high-side switch.

Claims (27)

1. A power converter having a charge pump frequency switching control mechanism, comprising:

a high-side switch, wherein a first terminal of the high-side switch is connected to an input voltage source;

a low-side switch, wherein a first terminal of the low-side switch is connected to a second terminal of the high-side switch, and a second terminal of the low-side switch is grounded;

a control circuit configured to output a high-side control signal and a low-side control signal;

a low-side driver circuit connected to a control terminal of the low-side switch and the control circuit, and configured to output a low-side driving signal to the control terminal of the low-side switch according to the low-side control signal from the control circuit;

a high-side driver circuit connected to a control terminal of the high-side switch and the control circuit, and configured to output a high-side driving signal to the control terminal of the high-side switch according to the high-side control signal from the control circuit;

a pulse signal generator circuit connected to the control circuit, configured to determine whether to generate a pulse wave in a high-side pulse enable signal according to a level of the high-side control signal from the control circuit, and configured to output the high-side pulse enable signal;

a clock generator circuit connected to the pulse signal generator circuit, configured to determine whether or not the pulse wave is in the high-side pulse enable signal to determine a frequency of a clock signal, and configured to output the clock signal; and

a charge pump connected to the clock generator circuit and the high-side driver circuit, wherein the charge pump determines a frequency of supplying power to the high-side driver circuit according to the frequency of the clock signal from the clock generator circuit, and the charge pump charges the high-side driver circuit to supply the power required for the high-side driver circuit to drive the high-side switch and to pull up a voltage of the control terminal of the high-side switch.

2. The power converter according to claim 1 , wherein the charge pump outputs a charging signal to the high-side driver circuit, the high-side driver circuit uses power of the charging signal from the charge pump to pull up the voltage of the control terminal of the high-side switch from an initial voltage to be higher than an input voltage of the input voltage source and to reach a voltage of the charging signal.

3. The power converter according to claim 1 , wherein, when the control circuit outputs the high-side control signal at a low level respectively to the pulse signal generator circuit and the high-side driver circuit, the pulse signal generator circuit outputs the high-side pulse enable signal at a low level to the clock generator circuit according to the high-side control signal at the low level, and the clock generator circuit outputs the clock signal having a low frequency to the charge pump according to the high-side pulse enable signal at the low level.

4. The power converter according to claim 3 , wherein, when the control circuit outputs the high-side control signal at a high level respectively to the pulse signal generator circuit and the high-side driver circuit, the pulse signal generator circuit outputs the high-side pulse enable signal having the pulse wave to the clock generator circuit according to the high-side control signal at the high level, and the clock generator circuit outputs the clock signal having a high frequency to the charge pump according to the high-side pulse enable signal having the pulse wave.

5. The power converter according to claim 1 , wherein, the frequency of the clock signal that is outputted by the clock generator circuit within time other than a working period of the pulse wave of the high-side pulse enable signal is equal to a first reference frequency;

wherein the frequency of the clock signal that is outputted by the clock generator circuit within the working period of the pulse wave of the high-side pulse enable signal is equal to a second reference frequency;

wherein the second reference frequency is higher than the first reference frequency.

6. The power converter according to claim 1 , wherein the charge pump includes:

a first capacitor, wherein a first terminal of the first capacitor is connected to the input voltage source and the high-side driver circuit, and a second terminal of the first capacitor is grounded.

7. The power converter according to claim 6 , wherein the charge pump further includes:

a second capacitor, wherein a first terminal of the second capacitor is connected to the input voltage source, and a second terminal of the second capacitor is connected to the first terminal of the first capacitor.

8. The power converter according to claim 7 , wherein the charge pump further includes:

a first switch component, wherein a first terminal of the first switch component is connected to the input voltage source, a second terminal of the first switch component is connected to the first terminal of the second capacitor, and a control terminal of the first switch component is connected to an output terminal of the clock generator circuit.

9. The power converter according to claim 8 , wherein the charge pump further includes:

a second switch component, wherein a first terminal of the second switch component is connected to the second terminal of the second capacitor, a second terminal of the second switch component is connected to the first terminal of the first capacitor, and a control terminal of the second switch component is connected to the output terminal of the clock generator circuit.

10. The power converter according to claim 9 , wherein the charge pump further includes:

a third switch component, wherein a first terminal of the third switch component is connected to the input voltage source, a second terminal of the third switch component is connected to the second terminal of the second capacitor, and a control terminal of the third switch component is connected to the output terminal of the clock generator circuit.

11. The power converter according to claim 10 , wherein the charge pump further includes:

a fourth switch component, wherein a first terminal of the fourth switch component is connected to the first terminal of the second capacitor, a second terminal of the fourth switch component is coupled to a reference voltage, and a control terminal of the fourth switch component is connected to the output terminal of the clock generator circuit.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 1, 2023
From: CHEN, KUN-MIN
To: ANPEC ELECTRONICS CORPORATION
Reel/Frame 064459/0231 →
Priority Claims (1)
TW 112116925 · May 8, 2023 · national
Continuity (1)
Related Publication 20240380318A1 · Nov 14, 2024
References Cited (4)
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US 11196339B1 · Jodka · 2021 [cited by examiner]
US 20150311884A1 · Saadat · 2015 [cited by examiner]
US 20240313631A1 · Ni · 2024 [cited by examiner]