IP Library › Granted Patent US 12,322,330
Granted Patent B2
US 12,322,330 · App. 18/483,282 · Granted Jun 3, 2025

Electronic devices with low refresh rate display pixels

Inventors: Chin-Wei Lin (San Jose, CA); Shyuan Yang (San Jose, CA); Chuang Qian (Santa Clara, CA); Abbas Jamshidi Roudbari (Saratoga, CA); Ting-Kuo Chang (San Jose, CA)
Assignee: Apple Inc.
G09G3/3225G09G3/3233G09G2300/0417G09G2300/043G09G2300/0819G09G2300/0861G09G2310/0262G09G2310/0297G09G2310/06G09G2310/061G09G2320/0214G09G2320/0242G09G2320/0247G09G2320/0252G09G2320/043G09G2320/045G09G2320/064G09G2340/0435
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,322,330
App. No.
18/483,282
Granted
Jun 3, 2025
Kind
B2
Abstract

A display may have an array of organic light-emitting diode display pixels operating at a low refresh rate. Each display pixel may have six thin-film transistors and one capacitor. One of the six transistors may serve as the drive transistor and may be compensated using the remaining five transistors and the capacitor. One or more on-bias stress operations may be applied before threshold voltage sampling to mitigate first frame dimming. Multiple anode reset and on-bias stress operations may be inserted during vertical blanking periods to reduce flicker and maintain balance and may also be inserted between successive data refreshes to improve first frame performance. Two different emission signals controlling each pixel may be toggled together using a pulse width modulation scheme to help provide darker black levels.

Claims (37)

1. A display pixel comprising:

a light-emitting diode;

a drive transistor coupled in series with the light-emitting diode;

an emission transistor coupled in series between the drive transistor and the light-emitting diode; and

a switching transistor configured to reset an anode of the light-emitting diode, wherein the switching transistor is activated multiple times during a vertical blanking period.

2. The display pixel of claim 1 , further comprising:

an initialization transistor coupled between an initialization line and a gate terminal of the drive transistor.

3. The display pixel of claim 2 , wherein the initialization transistor comprises a semiconducting-oxide transistor and wherein the drive transistor comprises a silicon transistor.

4. The display pixel of claim 2 , wherein the initialization transistor comprises an n-type semiconducting-oxide transistor and wherein the drive transistor comprises a p-type silicon transistor.

5. The display pixel of claim 1 , further comprising

a semiconducting-oxide transistor coupled between a gate terminal and a source-drain terminal of the drive transistor, wherein the drive transistor comprises a silicon transistor.

6. The display pixel of claim 1 , further comprising:

a capacitor having a first terminal coupled to a positive power supply line and having a second terminal coupled to the anode of the light-emitting diode.

7. The display pixel of claim 6 , further comprising:

an additional emission transistor coupled in series between the positive power supply line and the drive transistor.

8. The display pixel of claim 7 , wherein at least one of the emission transistor and the additional emission transistor is activated during the vertical blanking period.

9. The display pixel of claim 7 , wherein during at least a portion of the vertical blanking period, the emission transistor and the additional emission transistor are simultaneously activated.

10. The display pixel of claim 1 , wherein the switching transistor is configured to load a data signal into the display pixel.

11. A method of operating a display having a plurality of pixels each with a light-emitting diode, the method comprising:

during a first period, outputting a first frame;

during a second period, outputting a second frame different than the first frame; and

during a transition period between the first period and the second period, performing multiple anode reset operations for resetting an anode of the light-emitting diode to a reset voltage in at least some of the pixels in the display.

12. The method of claim 11 , wherein each pixel in the plurality of pixels further comprises:

a drive transistor; and

a switching transistor coupled to the drive transistor, wherein the switching transistor is activated during the multiple anode reset operations.

13. The method of claim 12 , wherein each pixel in the plurality of pixels further comprises:

an initialization transistor coupled to a gate terminal of the drive transistor.

14. The method of claim 13 , wherein the initialization transistor is also coupled to the anode of the light-emitting diode.

15. The method of claim 13 , wherein the drive transistor comprises a first silicon transistor and wherein the switching transistor comprises a second switching transistor.

16. The method of claim 13 , wherein the drive transistor comprises a silicon transistor and wherein the initialization transistor comprises a semiconducting-oxide transistor.

17. The method of claim 13 , wherein the switching transistor comprises a silicon transistor and wherein the initialization transistor comprises a semiconducting-oxide transistor.

18. The method of claim 13 , wherein the switching transistor is coupled between the anode of the light-emitting diode and a first voltage line, and wherein the initialization transistor is coupled between the gate terminal of the drive transistor and a second voltage line different than the first voltage line.

19. The method of claim 11 , further comprising:

during the transition period between the first period and the second period, performing multiple data refresh operations for loading data into at least some of the pixels in the display.

20. The method of claim 19 , wherein:

during the transition period, the data refresh operations are performed at a first frequency; and

during the transition period, the anode reset operations are performed at a second frequency different than the first frequency.

Continuity (7)
Continuation 17576619 · Jan 14, 2022
Continuation 17080685 · Oct 26, 2020
Continuation 16696578 · Nov 26, 2019
Continuation 16379323 · Apr 9, 2019
Division 15996366 · Jun 1, 2018
Provisional Application 62547030 · Aug 17, 2017
Related Publication 20240038159A1 · Feb 1, 2024
References Cited (44)
US 8411016B2 · Tanikame et al. · 2013 [cited by applicant]
US 9082346B2 · Shih · 2015 [cited by applicant]
US 9257074B2 · Tseng · 2016 [cited by applicant]
US 9489875B2 · Hwang et al. · 2016 [cited by applicant]
US 10854139B2 · Lin et al. · 2020 [cited by applicant]
US 20060044236A1 · Kim · 2006 [cited by applicant]
US 20060145989A1 · Han et al. · 2006 [cited by applicant]
US 20110069258A1 · Joo et al. · 2011 [cited by applicant]
US 20110156511A1 · Lau et al. · 2011 [cited by applicant]
US 20110193768A1 · Choi et al. · 2011 [cited by applicant]
US 20120026147A1 · Komiya · 2012 [cited by applicant]
US 20120033000A1 · Takahashi · 2012 [cited by examiner]
US 20120062536A1 · Park · 2012 [cited by applicant]
US 20130194248A1 · Kim · 2013 [cited by applicant]
US 20140118328A1 · Guo et al. · 2014 [cited by applicant]
US 20150109279A1 · Gupta et al. · 2015 [cited by applicant]
US 20150145849A1 · Choi et al. · 2015 [cited by applicant]
US 20160063921A1 · Tsai et al. · 2016 [cited by applicant]
US 20160124491A1 · An et al. · 2016 [cited by applicant]
US 20160140897A1 · Park et al. · 2016 [cited by applicant]
US 20160351122A1 · Jung · 2016 [cited by examiner]
US 20160351124A1 · Kim et al. · 2016 [cited by applicant]
US 20160379552A1 · Kim et al. · 2016 [cited by applicant]
US 20180226029A1 · Park et al. · 2018 [cited by applicant]
US 20180268760A1 · Chen et al. · 2018 [cited by applicant]
US 20180350307A1 · Tsai · 2018 [cited by applicant]
CN 1716368A · 2006 [cited by applicant]
CN 1874627A · 2006 [cited by applicant]
CN 101251977A · 2008 [cited by applicant]
CN 102651194A · 2012 [cited by applicant]
CN 103137067A · 2013 [cited by applicant]
CN 204166873U · 2015 [cited by applicant]
CN 104637437A · 2015 [cited by applicant]
CN 106205493A · 2016 [cited by applicant]
CN 106448554A · 2017 [cited by applicant]
CN 206210357U · 2017 [cited by applicant]
EP 1744299A2 · 2007 [cited by applicant]
KR 101478096B1 · 2015 [cited by applicant]
TW 201327527A1 · 2013 [cited by applicant]
TW 201403574A · 2014 [cited by applicant]
TW 201543441A · 2015 [cited by applicant]
WO 2017052727A1 · 2017 [cited by applicant]
Wang et al., Investigation on VTH Detection Methods for AMOLED Pixel Circuit Design with IGZO-TFT, Chinese Journal of Luminescence, May 31, 2016, pp. 608-615, Issue 5. [cited by applicant]
Jia et al., Simulation of The Stability of a-IGZO TFT-OLED Pixel Circuits, Chinese Journal of Luminescence, Sep. 30, 2013, pp. 1240-1244, Issue 9. [cited by applicant]