IP Library Granted Patent US 12,324,261
Granted Patent B2
US 12,324,261 · App. 18/508,699 · Granted Jun 3, 2025

Image sensing device

Inventors: Hyung June Yoon (Icheon-si, KR); Jong Eun Kim (Icheon-si, KR); Jong Chae Kim (Icheon-si, KR); Jae Won Lee (Icheon-si, KR); Jae Hyung Jang (Icheon-si, KR); Hoon Moo Choi (Icheon-si, KR)
Assignee: SK HYNIX INC.
H10F39/8033G01S7/4863H04N25/76
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Quick Facts
Patent No.
US 12,324,261
App. No.
18/508,699
Granted
Jun 3, 2025
Kind
B2
Abstract

An image sensing device is provided to include a pixel array having a plurality of pixels arranged in a matrix shape. Each of the pixels includes: a control node configured to generate a hole current in a substrate; a detection node configured to capture photocharge migrated by the hole current, formed in a shape whose at least part is partially open, and disposed to surround the control node, and a low resistance region including a dielectric layer formed in the substrate, and disposed in the opening on of the detection node. The low resistance region includes an inner low resistance region disposed between the control node and the center of the pixel.

Claims (27)

1. An image sensing device, comprising:

a pixel array including a plurality of pixels arranged in a matrix shape,

wherein each of the plurality of pixels is structured to respond to incident light to produce photocharge indicative of detected incident light and comprises:

a control node configured to receive a control signal for generating a current that carries the photocharge;

a detection node spaced from the control node and configured to have a shape that surrounds the control node and includes an opening, the detection node operable to capture the photocharge migrated by the current; and

a low resistance region disposed in the opening of the detection node, the low resistance region including a dielectric layer exhibiting a lower resistance than a resistance of the detection node.

2. The image sensing device of claim 1 , wherein the plurality of pixels further comprises:

a voltage stabilization area disposed at a vertex of a pixel; and

a pixel transistor area including at least one pixel transistor configured to process the photocharge generated in the pixel.

3. The image sensing device of claim 2 , wherein the voltage stabilization area abuts on a well region forming a body of the at least one pixel transistor and is configured to receive a voltage to disable a transfer of the photocharge.

4. The image sensing device of claim 2 , wherein the voltage stabilization area of the pixel is shared by an adjacent pixel in a row direction, column direction or diagonal direction of the pixel array.

5. The image sensing device of claim 1 , wherein the dielectric layer is disposed at a predetermined depth from one surface of a substrate.

6. The image sensing device of claim 1 , further comprising a depletion region disposed under the detection node,

wherein a depth of the depletion region from one surface of a substrate is larger than a depth of the dielectric layer of the low resistance region.

7. The image sensing device of claim 1 , wherein the control node, the detection node and the low resistance region are configured as a first tap structure and a pixel further includes second to fourth tap structures, each including a corresponding detection node and a corresponding control node.

8. The image sensing device of claim 7 , wherein the first and fourth tap structures are configured to receive a first demodulation control signal for generating the current, and

the second and third tap structures are configured to receive a second demodulation control signal for generating the current.

9. The image sensing device of claim 8 , wherein the first demodulation control signal has a first voltage level to enable a transfer of the photocharge and the second demodulation control signal has a second voltage level to disable the transfer of the photocharge, and

wherein the first and second demodulation control signals are out of phase with each other.

10. The image sensing device of claim 7 , wherein the first and fourth tap structures are disposed in a first diagonal direction passing through a center of the pixel, and

the second and third tap structures are disposed in a second diagonal direction different from the first diagonal direction and passing through the center of the pixel.

11. The image sensing device of claim 10 , wherein low resistance regions of the first and fourth tap structures are disposed in the first diagonal direction, and

the low resistance regions of the second and third tap structures are disposed in the second diagonal direction.

12. The image sensing device of claim 1 , wherein each of the pixels further comprises a current path control area disposed in a center of the pixel.

13. The image sensing device of claim 12 , wherein the current path control area has a potential lower than that of the control node receiving a first voltage to enable a transfer of the photocharge, and higher than that of the control node receiving a second voltage to disable the transfer of the photocharge.

14. The image sensing device of claim 1 , wherein the detection node and the low resistance region form a ring shape to surround the control node.

15. The image sensing device of claim 1 , wherein, for the current, the low resistance region has lower resistance than the detection node.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 14, 2023
From: YOON, HYUNG JUNE; KIM, JONG EUN; KIM, JONG CHAE; LEE, JAE WON; JANG, JAE HYUNG; CHOI, HOON MOO
To: SK HYNIX INC.
Reel/Frame 065557/0864 →
Priority Claims (1)
KR 10-2020-0126884 · Sep 29, 2022 · national
Continuity (2)
Continuation 17463310 · Aug 31, 2021
Related Publication 20240088177A1 · Mar 14, 2024
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