IP Library › Granted Patent US 12,333,996
Granted Patent B2
US 12,333,996 · App. 17/957,824 · Granted Jun 17, 2025

Display module and driving method of display module

Inventors: Jinho Kim (Suwon-si, KR); Yong-Sang Kim (Suwon-si, KR); Sangmin Shin (Suwon-si, KR); Donggun Oh (Suwon-si, KR); Jongsu Oh (Suwon-si, KR)
Assignees: SAMSUNG ELECTRONICS CO., LTD.; RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY
G09G3/32G09G3/3233G09G2300/0452G09G2300/0852G09G2310/066G09G2320/0242G09G2320/045G09G2320/0633G09G2320/064
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Quick Facts
Patent No.
US 12,333,996
App. No.
17/957,824
Granted
Jun 17, 2025
Kind
B2
Abstract

A display module may include a plurality of pixels, wherein each of the plurality of pixels includes a plurality of subpixels of different colors that are disposed in a matrix form. Each of the plurality of subpixels includes an inorganic light emitting element, a constant current generator which provides a constant current to the inorganic light emitting element, and a pulse width modulation (PWM) circuit which includes a first depletion mode driving transistor, and controls a time during which the constant current flows through the inorganic light emitting element based on a PWM data voltage applied to a gate terminal of the first depletion mode driving transistor and a threshold voltage of the first depletion mode driving transistor.

Claims (49)

1. A display module comprising a plurality of pixels,

wherein each of the plurality of pixels comprises a plurality of subpixels of different colors that are disposed in a matrix form, and

wherein each of the plurality of subpixels comprises:

an inorganic light emitting element;

a constant current generator which provides a constant current to the inorganic light emitting element; and

a pulse width modulation (PWM) circuit comprising a first depletion mode driving transistor and an internal compensation circuit to compensate a threshold voltage of the first depletion mode driving transistor,

wherein the internal compensation circuit obtains the threshold voltage of the first depletion mode driving transistor corresponding to a difference between an input voltage inputted to a gate of the first depletion mode driving transistor and a voltage outputted from a source terminal while the first depletion mode driving transistor operates as a source follower,

wherein the PWM circuit obtains a PWM data voltage in which the threshold voltage of the first depletion mode driving transistor is compensated, and controls a time during which the constant current flows through the inorganic light emitting element based on the compensated PWM data voltage,

wherein the PWM circuit comprises a first capacitor connected between a gate terminal and the source terminal of the first depletion mode driving transistor and configured to receive a reference signal through a node A connecting the gate terminal of the first depletion mode driving transistor to the first capacitor, and a second capacitor connected between the gate terminal and the source terminal of the first depletion mode driving transistor and configured to receive a data signal through a node B connecting the second capacitor to the source terminal of the first depletion mode driving transistor and the first capacitor, and

wherein one end of the second capacitor is directly connected to each of the node B, the first capacitor, and the source terminal of the first depletion mode driving transistor, and another end of the second capacitor is directly connected to each of the node A, the first capacitor, and the gate terminal of the first depletion mode driving transistor.

2. The display module according to claim 1 , wherein

the first capacitor comprises a first terminal and a second terminal,

the first terminal of the first capacitor is connected to the source terminal of the first depletion mode driving transistor, and the second terminal is connected to the gate terminal of the first depletion mode driving transistor,

the threshold voltage of the first depletion mode driving transistor is obtained through the first capacitor while a reference voltage is applied to the second terminal of the first capacitor and the gate terminal of the first depletion mode driving transistor, and the first depletion mode driving transistor operates as the source follower.

3. The display module according to claim 2 , wherein the first depletion mode driving transistor operates as the source follower while a direct current (DC) voltage is applied to a drain terminal of the first depletion mode driving transistor, and

wherein, based on a reference voltage being applied to the gate terminal of the first depletion mode driving transistor while the first depletion mode driving transistor operates as the source follower, a voltage of the source terminal of the first depletion mode driving transistor becomes a first voltage based on the reference voltage and the threshold voltage of the first depletion mode driving transistor.

4. The display module according to claim 3 , wherein the first terminal of the first capacitor is connected to the gate terminal of the first depletion mode driving transistor and the second terminal of the PWM circuit to which the first voltage is applied and then the PWM data voltage is applied, and

wherein, based on the PWM data voltage being applied to the second terminal of the first capacitor, the voltage of the gate terminal of the first depletion mode driving transistor becomes a second voltage based on the PWM data voltage and the threshold voltage of the first depletion mode driving transistor from the reference voltage.

5. The display module according to claim 4 , wherein, based on the second voltage applied to the gate terminal of the first depletion mode driving transistor becoming the threshold voltage of the first depletion mode driving transistor by changing according to a sweep voltage which changes linearly and is applied through the second terminal of the first capacitor, the PWM circuit is configured to control the constant current generator to stop the constant current which flows through the inorganic light emitting element.

6. The display module according to claim 1 , wherein the constant current generator comprises a pulse amplitude modulation (PAM) circuit, and

wherein the PAM circuit comprises a second depletion mode driving transistor and is configured to control a magnitude of the constant current based on a PAM data voltage applied to a gate terminal of the second depletion mode driving transistor and a threshold voltage of the second depletion mode driving transistor.

7. The display module according to claim 6 , wherein the threshold voltage of the second depletion mode driving transistor is obtained from a source terminal of the second depletion mode driving transistor while the second depletion mode driving transistor operates as a source follower.

8. The display module according to claim 7 , wherein the second depletion mode driving transistor operates as the source follower while a direct current (DC) voltage is applied to a drain terminal, and

wherein, based on a reference voltage being applied to the gate terminal of the second depletion mode driving transistor while the second depletion mode driving transistor operates as the source follower, a voltage of the source terminal of the second depletion mode driving transistor becomes a third voltage based on the reference voltage and the threshold voltage of the second depletion mode driving transistor.

9. The display module according to claim 8 , wherein the constant current generator comprises a second capacitor comprising a first terminal connected to the gate terminal of the second depletion mode driving transistor and a second terminal to which the third voltage is applied and then the PAM data voltage is applied, and

wherein, based on the PAM data voltage being applied to the second terminal of the second capacitor, the voltage of the gate terminal of the second depletion mode driving transistor becomes a fourth voltage based on the PAM data voltage and the threshold voltage of the second depletion mode driving transistor from the reference voltage.

10. The display module according to claim 9 , wherein the fourth voltage is maintained in the gate terminal of the second depletion mode driving transistor, until a gate terminal voltage of the first depletion mode driving transistor changes according to a sweep voltage which changes linearly and is applied to the PWM circuit and a voltage between the gate terminal and the source terminal of the first depletion mode driving transistor becomes the threshold voltage of the first depletion mode driving transistor.

11. The display module according to claim 6 , wherein the PWM data voltage is sequentially applied to the plurality of pixels disposed in the matrix form in a line unit, and

wherein the PAM data voltage is applied to the plurality of pixels disposed in the matrix form at once.

12. The display module according to claim 6 , wherein the display module is divided into a plurality of regions, and

wherein the constant current generator is configured to receive the PAM data voltage for each of the plurality of regions.

13. The display module according to claim 6 , wherein the display module is one of a plurality of display modules included in a display panel, and

wherein a PAM data voltage applied to a first display module among the plurality of display modules and a PAM data voltage applied to a second display module among the plurality of display modules are different from each other.

14. The display module according to claim 1 , wherein the constant current generator and the PWM circuit are formed in an oxide TFT layer on a substrate, and

wherein the inorganic light emitting element is mounted on the TFT layer so as to be electrically connected to the constant current generator and the PWM circuit.

15. The display module according to claim 1 , wherein the source terminal of the first depletion mode driving transistor included in the PWM circuit is connected to a gate terminal of a second depletion mode driving transistor included in the constant current generator.

16. The display module according to claim 1 , wherein the display module is configured to:

in an initialization session, apply an initial voltage to the node A and the node B of the PWM circuit;

in a threshold extraction session, extract the threshold voltage of the first depletion mode driving transistor by applying a reference voltage to the node A of the PWM circuit and applying a DC voltage to a drain terminal of the first depletion mode driving transistor, and outputting a differential voltage between the reference voltage and the threshold voltage from the source terminal of the first depleting driving transistor; and

in a data voltage setting session, set the PWM data voltage to a voltage of the gate terminal of the first depletion mode driving transistor by changing a voltage of the node B from the differential voltage to the PWM data voltage and changing a voltage of the node A from the reference voltage to a sum of the PWM data voltage and the threshold voltage.

17. The display module according to claim 1 , wherein the data signal and the reference signal are received through two separate signal lines.

18. The display module according to claim 1 , wherein the reference signal is directly through the node A connecting the gate terminal of the first depletion mode driving transistor to the first capacitor.

19. A method for driving a display module comprising a plurality of pixels, wherein each of the plurality of pixels comprises a plurality of subpixels of different colors that are disposed in a matrix form, and wherein each of the plurality of subpixels comprises an inorganic light emitting element, a constant current generator which provides a constant current to the inorganic light emitting element, and a pulse width modulation (PWM) circuit which comprises a first depletion mode driving transistor and an internal compensation circuit,

wherein the PWM circuit comprises a first capacitor connected between a gate terminal and a source terminal of the first depletion mode driving transistor and configured to receive a reference signal through a node A connecting the gate terminal of the first depletion mode driving transistor to the first capacitor, and a second capacitor connected between the gate terminal and the source terminal of the first depletion mode driving transistor and configured to receive a data signal through a node B connecting the second capacitor to the source terminal of the first depletion mode driving transistor and the first capacitor,

wherein one end of the second capacitor is directly connected to each of the node B, the first capacitor, and the source terminal of the first depletion mode driving transistor, and another end of the second capacitor is directly connected to each of the node A, the first capacitor, and the gate terminal of the first depletion mode driving transistor, and

wherein the method comprises:

obtaining a threshold voltage of the first depletion mode driving transistor corresponding to a difference between an input voltage inputted to a gate of the first depletion mode driving transistor and a voltage outputted from the source terminal while the first depletion mode driving transistor operates as a source follower;

applying a PWM data voltage compensated based on the threshold voltage to the gate terminal of the first depletion mode driving transistor; and

controlling a time during which the constant current flows through the inorganic light emitting element based on the compensated PWM data voltage.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 30, 2022
From: KIM, JINHO; KIM, YONG-SANG; OH, DONGGUN; OH, JONGSU
To: SAMSUNG ELECTRONICS CO., LTD.; RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY
Reel/Frame 061276/0550 →
EMPLOYEE'S INVENTION REPORT Recorded Sep 30, 2022
From: SHIN, SANGMIN
To: SAMSUNG ELECTRONICS CO., LTD.; RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY
Reel/Frame 061578/0322 →
Priority Claims (1)
KR 10-2020-0045979 · Apr 16, 2020 · national
Continuity (2)
Continuation PCTKR2021004650 · Apr 13, 2021
Related Publication 20230024912A1 · Jan 26, 2023
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Cited By (1)
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