Circuit for controlling a resistive circuit

1. A circuit, comprising:

a heater drive node configured to be coupled to a resistive heater element to provide a drive current thereto, wherein power dissipated in the resistive heater element varies over time as a function of an intensity of the drive current provided to the resistive heater element;

control circuitry configured to vary the intensity of the drive current of the resistive heater element, wherein the control circuitry comprises:

driver circuitry configured to produce an analog target voltage based on an analog drive current intensity signal; and

an output circuit coupled to the driver circuitry to receive therefrom the analog target voltage, the output circuit configured to produce the drive current provided to the resistive heater element based on the analog target voltage, wherein the output circuit is configured to control the power dissipated in the resistive heater element independently of a resistance value of the resistive heater element, and the output circuit comprises an amplifier and a feedback capacitor coupled between an output of the amplifier and the heater drive node.

2. The circuit of claim 1 , wherein:

the driver circuitry is configured to provide the drive current based on the analog target voltage with a respective slew rate, and

the output circuit is configured to control the respective slew rate of the drive current provided to the resistive heater element independently of the resistance value of the resistive heater element.

3. The circuit of claim 1 , wherein the output circuit is configured to produce:

the drive current based on the analog target voltage from the driver circuitry; and

a feedback current signal indicative of the intensity of the drive current produced by the output circuit.

4. The circuit of claim 3 , wherein the feedback current signal is a down-scaled replica of the drive current flowing in the resistive heater element.

5. The circuit of claim 1 , further comprising:

a bias current generator coupled to the amplifier and configured to provide a bias current thereto, wherein the amplifier comprises a first input configured to receive the analog target voltage; and

a resistive voltage divider coupled to a second input of the amplifier and to the heater drive node.

6. The circuit of claim 5 , wherein the bias current generator is a programmable current generator.

7. The circuit of claim 5 , wherein the resistive voltage divider has an equivalent series resistance greater than the resistance value of the resistive heater element.

8. The circuit of claim 5 , wherein:

the driver circuitry is configured to provide the drive current based on the analog target voltage with a respective slew rate;

the output circuit is configured to control the respective slew rate of the drive current provided to the resistive heater element independently of the resistance value of the resistive heater element; and

the output circuit is configured to control the respective slew rate of a voltage of the heater drive node based on a ratio of the bias current and a capacitance of the feedback capacitor.

9. The circuit of claim 1 , wherein:

the driver circuitry comprises a trans-linear circuit configured to receive the analog drive current intensity signal and to apply a current based on the analog drive current intensity signal to a reference resistor, and

the analog target voltage is equal to a voltage drop across the reference resistor.

10. The circuit of claim 1 , wherein:

the resistive heater element is configured to be thermally coupled to a tip of a read/write head in a memory storage device;

the read/write head is configured to have a spacing between the tip and a storage medium surface in the memory storage device;

the spacing varies as a function of the power dissipated in the resistive heater element; and

the power dissipated varies as a function of the intensity of the drive current provided to the resistive heater element.

11. The circuit of claim 1 , wherein a slew rate of a voltage of the heater drive node is based on a capacitance of the feedback capacitor.

12. A memory storage device, comprising:

a read/write head configured to have a spacing between a tip of the read/write head and a storage medium surface in the memory storage device, and

the circuit according to claim 1 coupled to the read/write head, the circuit configured to control power dissipated in the resistive heater element,

wherein the spacing varies as a function of the intensity of the drive current provided to the resistive heater element.

13. The memory storage device of claim 12 , wherein the memory storage device comprises a hard-disk drive, HDD.

14. A circuit, comprising:

an output transistor having an output node configured to be coupled to a heater resistor;

an amplifier having an output coupled to a control node of the output transistor;

a passive circuit element coupled between the output node of the output transistor and a first input of the amplifier; and

a feedback capacitor coupled between the output of the amplifier and the output node of the output transistor.

15. The circuit of claim 14 , wherein a slew rate of a voltage at the output node of the output transistor is based on a bias current of the amplifier and a capacitance of the feedback capacitor.

16. The circuit of claim 14 , further comprising the heater resistor.

17. The circuit of claim 14 , further comprising a translinear divider circuit coupled between a current input node and a second input of the amplifier, the translinear divider circuit configured to provide an output current proportional to a current provided at the current input node divided by a current flowing through the heater resistor.

18. The circuit of claim 17 , further comprising a current digital-to-analog converter (DAC) coupled to the current input node.