IP Library › Granted Patent US 12,340,850
Granted Patent B2
US 12,340,850 · App. 17/994,907 · Granted Jun 24, 2025

Source bias temperature compensation for read and program verify operations on a memory device

Inventors: Ronit Roneel Prakash (Hiratsuka, JP); Ching-Huang Lu (Fremont, CA)
Assignee: Micron Technology, Inc.
G11C16/3459G11C7/04G11C16/26
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Quick Facts
Patent No.
US 12,340,850
App. No.
17/994,907
Granted
Jun 24, 2025
Kind
B2
Abstract

Control logic in a memory device receives a request to perform a memory access operation on a memory array of the memory device and determines an operating temperature of the memory device. The control logic further modifies a default magnitude of a source voltage signal based on the operating temperature to a form a modified source voltage signal, causes the modified source voltage signal to be applied to the memory array, and performs the memory access operation on the memory array.

Claims (43)

1. A memory device comprising:

a memory array comprising a plurality of strings of memory cells coupled between a bitline and a source terminal, wherein respective memory cells in each of the plurality of strings of memory cells are coupled to respective wordlines; and

control logic, operatively coupled with the memory array, to perform operations comprising:

receiving a request to perform a memory access operation on the memory array;

determining an operating temperature of the memory device;

modifying a default magnitude of a source voltage signal based on the operating temperature to form a modified source voltage signal;

causing the modified source voltage signal to be applied to the source terminal of the memory array; and

performing the memory access operation on the memory array using the modified source voltage signal.

2. The memory device of claim 1 , wherein the memory access operation comprises a read operation.

3. The memory device of claim 1 , wherein the memory access operation comprises a program-verify operation.

4. The memory device of claim 1 , wherein the memory device further comprises an on-die temperature sensor, and wherein determining the operating temperature of the memory device comprises obtaining a temperature measurement from the on-die temperature sensor.

5. The memory device of claim 1 , wherein determining the operating temperature of the memory device comprises receiving a temperature measurement from a temperature sensor external to the memory device.

6. The memory device of claim 1 , wherein modifying the default magnitude of the source voltage signal based on the operating temperature to form the modified source voltage signal comprises:

determining a temperature compensation value associated with the operating temperature; and

modifying the default magnitude of the source voltage signal by an amount corresponding to the temperature compensation value.

7. The memory device of claim 6 , wherein determining the temperature compensation value associated with the operating temperature comprises calculating an intermediate temperature compensation value and identifying the temperature compensation value from the intermediate temperature compensation value based on a granularity of a source voltage signal driver.

8. The memory device of claim 6 , wherein determining the temperature compensation value associated with the operating temperature comprises identifying a corresponding entry of a plurality of entries in a look-up table, wherein the corresponding entry is associated with the operating temperature and comprises an indication of the temperature compensation value.

9. A method comprising:

receiving a request to perform a memory access operation on a memory array of a memory device, the memory array comprising a plurality of strings of memory cells coupled between a bitline and a source terminal, wherein respective memory cells in each of the plurality of strings of memory cells are coupled to respective wordlines;

determining an operating temperature of the memory device;

modifying a default magnitude of a source voltage signal based on the operating temperature to form a modified source voltage signal;

causing the modified source voltage signal to be applied to the source terminal of the memory array; and

performing the memory access operation on the memory array using the modified source voltage signal.

10. The method of claim 9 , wherein the memory access operation comprises a read operation.

11. The method of claim 9 , wherein the memory access operation comprises a program-verify operation.

12. The method of claim 9 , wherein the memory device further comprises an on-die temperature sensor, and wherein determining the operating temperature of the memory device comprises obtaining a temperature measurement from the on-die temperature sensor.

13. The method of claim 9 , wherein determining the operating temperature of the memory device comprises receiving a temperature measurement from a temperature sensor external to the memory device.

14. The method of claim 9 , wherein modifying the default magnitude of the source voltage signal based on the operating temperature to form the modified source voltage signal comprises:

determining a temperature compensation value associated with the operating temperature; and

modifying the default magnitude of the source voltage signal by an amount corresponding to the temperature compensation value.

15. The method of claim 14 , wherein determining the temperature compensation value associated with the operating temperature comprises calculating an intermediate temperature compensation value and identifying the temperature compensation value from the intermediate temperature compensation value based on a granularity of a source voltage signal driver.

16. The method of claim 14 , wherein determining the temperature compensation value associated with the operating temperature comprises identifying a corresponding entry of a plurality of entries in a look-up table, wherein the corresponding entry is associated with the operating temperature and comprises an indication of the temperature compensation value.

17. A memory device comprising:

a memory array comprising a plurality of strings of memory cells coupled between a bitline and a source terminal, wherein respective memory cells in each of the plurality of strings of memory cells are coupled to respective wordlines; and

control logic, operatively coupled with the memory array, to perform operations comprising:

determining an operating temperature of the memory device;

adjusting a magnitude of a source voltage signal to an adjusted magnitude based on the operating temperature; and

performing at least one of a read operation or a program verify operation on the memory array when the source voltage signal with the adjusted magnitude is applied to the source terminal of the memory array.

18. The memory device of claim 17 , wherein the memory device further comprises an on-die temperature sensor, and wherein determining the operating temperature of the memory device comprises obtaining a temperature measurement from the on-die temperature sensor.

19. The memory device of claim 17 , wherein determining the operating temperature of the memory device comprises receiving a temperature measurement from a temperature sensor external to the memory device.

20. The memory device of claim 17 , wherein adjusting the magnitude of the source voltage signal to the adjusted magnitude based on the operating temperature:

determining a temperature compensation value associated with the operating temperature; and

modifying a default magnitude of the source voltage signal by an amount corresponding to the temperature compensation value.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 28, 2022
From: PRAKASH, RONIT RONEEL; LU, CHING-HUANG
To: MICRON TECHNOLOGY, INC.
Reel/Frame 061894/0766 →
Continuity (2)
Provisional Application 63292201 · Dec 21, 2021
Related Publication 20230197175A1 · Jun 22, 2023
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