IP Library Granted Patent US 12,342,401
Granted Patent B2
US 12,342,401 · App. 17/969,482 · Granted Jun 24, 2025

Electronic device for scheduling transmission or reception of data through a plurality of links and method of operating the same

Inventors: Hyunkee Min (Suwon-si, KR); Moonsoo Kim (Suwon-si, KR); Junghun Lee (Suwon-si, KR); Minsik Hwang (Suwon-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H04W76/15H04L1/0003H04W52/0216
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,342,401
App. No.
17/969,482
Granted
Jun 24, 2025
Kind
B2
Abstract

An electronic device may include a communication circuit configured to transmit and receive data to and from a first external electronic device through a first link of short-range wireless communication while the electronic device operates in a soft AP mode and to transmit and receive data to and from a second external electronic device through a second link of the short-range wireless communication while the electronic device operates in an STA mode; and a processor, wherein the processor may be configured to identify a control method of the first link and the second link, and to configure at least one parameter related to a period during which data transmission and/or reception through the second link is possible based on at least one parameter related to a period during which data transmission and/or reception through the first link is possible corresponding to identifying that the control method does not simultaneously perform data transmission and/or reception through the first link and the second link. Further, various other embodiments are possible.

Claims (29)

1. An electronic device, comprising:

a communication circuit configured to transmit and receive data to and from a first external electronic device through a first link of short-range wireless communication while the electronic device operates in a soft AP mode and to transmit and receive data to and from a second external electronic device through a second link of the short-range wireless communication while the electronic device operates in an STA mode; and

a processor,

wherein the processor is configured to:

identify a control technique of the first link and the second link, and

configure at least one parameter related to a period during which data transmission and/or reception through the second link is available based on at least one parameter related to a period during which data transmission and/or reception through the first link is available corresponding to identification that the control technique does not simultaneously perform data transmission and/or reception through the first link and the second link.

2. The electronic device of claim 1 , wherein the processor is configured to configure at least one parameter related to a period during which data transmission and/or reception through the second link is available so that a period for performing data transmission and/or reception through the first link and a period for performing data transmission and/or reception through the second link do not overlap.

3. The electronic device of claim 1 , wherein the processor is configured to configure target wake time (TWT) duration and a TWT interval so that the TWT duration and a period for performing data transmission and/or reception through the first link do not overlap in case that a TWT is to be performed through the second link.

4. The electronic device of claim 1 , wherein the processor is configured to control to transmit a signal instructing to perform data transmission and/or reception through the second link so that a period for performing data transmission and/or reception through the first link and a period for performing data transmission and/or reception through the second link do not overlap in case for operating in a power management mode or automatic power save delivery (APSD) mode through the second link.

5. The electronic device of claim 4 , wherein the processor is configured to control to transmit a signal instructing completion of data transmission and/or reception through the second link before a period for performing data transmission and/or reception through the first link begins.

6. The electronic device of claim 4 , wherein the processor is configured to control to transmit a signal instructing to perform at least one operation for ending a period performing data transmission and/or reception through the first link and data transmission and/or reception through the second link corresponding to completion of data transmission and/or reception through the first link during a period for performing data transmission and/or reception through the first link.

7. The electronic device of claim 4 , wherein the signal instructing to perform data transmission and/or reception through the second link comprises length information of a period for performing data transmission and/or reception through the second link.

8. The electronic device of claim 1 , wherein the processor is configured to determine at least one parameter related to a period during which data transmission and/or reception through the first link is available based on a size of data transmitted and/or received to and/or from the first external electronic device and/or a modulation and coding scheme (MCS) of the first link.

9. The electronic device of claim 1 , wherein the processor is configured to:

identify a difference between a frequency band of the first link and a frequency band of the second link corresponding to identifying that the control technique simultaneously performs data transmission and/or reception through the first link and the second link, and

configure at least one parameter related to a period during which data transmission and/or reception through the second link is available based on at least one parameter related to a period during which data transmission and/or reception through the first link is available corresponding to identifying that the difference is greater than or equal to a designated value.

10. The electronic device of claim 1 , wherein the control technique of the first link and the second link comprises at least one control technique amongst: a real simultaneous dual band (RSDB), a virtual simultaneous dual band (VSDB), and/or single channel concurrent (SCC).

11. The electronic device of claim 1 , wherein the processor is a processor implemented within the communication circuit.

12. The electronic device of claim 1 , wherein the processor is an application processor.

13. A method of operating an electronic device, the method comprising:

identifying a control method of a first link used for transmitting and receiving data to and from a first external electronic device while the electronic device operates in a soft AP mode and a second link used for transmitting and receiving data to and from a second external electronic device while the electronic device operates in an STA mode; and

configuring at least one parameter related to a period during which data transmission and/or reception through the second link is possible based on at least one parameter related to a period during which data transmission and/or reception through the first link is possible corresponding to identifying that the control method does not simultaneously perform data transmission and/or reception through the first link and the second link.

14. The method of claim 13 , wherein configuring at least one parameter comprises configuring at least one parameter related to a period during which data transmission and/or reception through the second link is possible so that a period for performing data transmission and/or reception through the first link and a period for performing data transmission and/or reception through the second link do not overlap.

15. The method of claim 13 , wherein configuring at least one parameter comprises configuring TWT duration and a TWT interval so that a period for performing data transmission and/or reception through the first link and the TWT duration do not overlap when performing a target wake time (TWT) through the second link.

16. The method of claim 13 , further comprising transmitting a signal instructing to perform data transmission and/or reception through the second link so that a period for performing data transmission and/or reception through the first link and a period for performing data transmission and/or reception through the second link do not overlap when operating in a power management mode or an automatic power save delivery (APSD) mode through the second link.

17. The method of claim 16 , further comprising transmitting a signal instructing completion of data transmission and/or reception through the second link before a period for performing data transmission and/or reception through the first link begins.

18. The method of claim 16 , further comprising performing at least one operation for ending a period for performing data transmission and/or reception through the first link and transmitting a signal instructing to perform data transmission and/or reception through the second link corresponding to completion of data transmission and/or reception through the first link during a period for performing data transmission and/or reception through the first link.

19. The method of claim 16 , wherein the signal instructing to perform data transmission and/or reception through the second link comprises length information of a period for performing data transmission and/or reception through the second link.

20. The method of claim 13 , further comprising determining at least one parameter related to a period during which data transmission and/or reception through the first link is possible based on a size of data transmitted or received to or from the first external electronic device and/or a modulation and coding scheme (MCS) of the first link.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2022
From: MIN, HYUNKEE; KIM, MOONSOO; LEE, JUNG-HUN; HWANG, MIN-SIK
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 061474/0047 →
Priority Claims (2)
KR 10-2021-0149166 · Nov 2, 2021 · national
KR 10-2021-0185419 · Dec 22, 2021 · national
Continuity (2)
Continuation PCTKR2022014445 · Sep 27, 2022
Related Publication 20230136828A1 · May 4, 2023
References Cited (23)
US 10194411B2 · Shilov et al. · 2019 [cited by applicant]
US 10517106B1 · Wang et al. · 2019 [cited by applicant]
US 11032763B2 · Li et al. · 2021 [cited by applicant]
US 11166332B2 · Komoriya · 2021 [cited by applicant]
US 20140269473A1 · Kondabattini · 2014 [cited by examiner]
US 20140355527A1 · Vaidya · 2014 [cited by examiner]
US 20170064633A1 · Jia et al. · 2017 [cited by applicant]
US 20200260513A1 · Huang · 2020 [cited by examiner]
US 20200260517A1 · Huang et al. · 2020 [cited by applicant]
US 20210153294A1 · Seo et al. · 2021 [cited by applicant]
US 20210289575A1 · Cherian et al. · 2021 [cited by applicant]
US 20220078791A1 · Jiang et al. · 2022 [cited by applicant]
US 20230054755A1 · Patil · 2023 [cited by examiner]
US 20230075274A1 · Kamath et al. · 2023 [cited by applicant]
CN 112135270A · 2020 [cited by applicant]
KR 1020150128326 · 2015 [cited by applicant]
KR 1020200095375 · 2020 [cited by applicant]
WO WO2019208930A1 · 2019 [cited by applicant]
WO WO2020176831A1 · 2020 [cited by applicant]
WO WO2021183711A1 · 2021 [cited by applicant]
WO WO2023080447A1 · 2023 [cited by applicant]
International Search Report dated Dec. 20, 2022 for PCT/KR2022/014445. [cited by applicant]
Notification of Publication dated May 11, 2023 for PCT/KR2022/014445. [cited by applicant]