Semiconductor structure and method making the same
The invention provides a semiconductor structure and a manufacturing method making the semiconductor structure. The method includes: providing a substrate; forming semiconductor pillars on the substrate; forming gate electrodes on the middle sidewalls of the semiconductor pillars; and performing dopant implantation to form source and drain regions. Since the gate-all-around (GAA) gates surrounding the semiconductor pillars are formed first, and the source region and the drain region are formed later by doping implantation, the precise position of the doping implantation can be ensured, thereby improving the fabrication accuracy of the semiconductor structure and improving the performance of the semiconductor structure.
1. A method of fabricating a semiconductor structure, comprising:
provide a substrate;
forming a semiconductor pillar comprising of one type of dopants on the substrate;
forming a gate electrode on middle sidewalls of the semiconductor pillar;
performing doping implantation to the semiconductor pillar, wherein the doping implantation is targeted on upper and lower portions of the semiconductor pillar to form source regions and drain regions, and wherein the doping implantation comprises an opposite type of dopants from the one type of dopants of the semiconductor pillar;
wherein a bit line is formed in the substrate, and wherein the semiconductor pillar is located on the bit line, wherein the method further comprises:
after forming the semiconductor pillar and before forming the gate electrode, a bit line metal silicide of the bit line is formed within the substrate.
2. The method for fabricating the semiconductor structure according to claim 1 , wherein
if the semiconductor pillar is made of a p-type semiconductor material, an n-type doping implantation is performed on the upper and lower portions of the semiconductor pillar;
and wherein if the semiconductor pillar is of an n-type semiconductor material, a p-type doping implants is performed on the upper and lower portions of the semiconductor pillar.
3. The method for fabricating the semiconductor structure according to claim 1 , wherein
the upper and lower portions of the semiconductor pillar are doped by plasma doping.
4. The method for fabricating the semiconductor structure according to claim 3 , further comprising:
after the upper and lower portions of the semiconductor pillar are doped with plasma doping, an annealing treatment is performed.
5. The method for fabricating the semiconductor structure according to claim 1 , wherein
the gate electrode is Gate-All-Around (GAA) gate.
6. The method for fabricating the semiconductor structure according to claim 1 , wherein
the method further comprises:
before forming the bit line metal silicide, a sidewall protection layer is formed on the sidewall of the semiconductor pillar.
7. The method for fabricating the semiconductor structure according to claim 6 , wherein
after forming the sidewall protection layer, a metal material is deposited in the substrate and annealed to form the bit line metal silicide.
8. The method for fabricating the semiconductor structure according to claim 1 , wherein
a first trench and a second trench are formed on the substrate along a first direction and a second direction respectively, wherein the first trench and the second trench combine to form independent semiconductor pillars, wherein the bit lines extend along the first direction in the substrate, and wherein the semiconductor pillars are located on the bit lines; and
wherein a depth of the first trench is greater than a depth of the second trench.
9. The method for fabricating the semiconductor structure according to claim 8 , wherein
the first direction is perpendicular to the second direction in the substrate.
10. The method for fabricating the semiconductor structure according to claim 1 , wherein
the gate electrode comprises a gate barrier layer and a gate metal layer sequentially formed on the semiconductor pillar.
11. The method for fabricating the semiconductor structure according to claim 10 , wherein
forming the gate electrodes on the sidewalks of the semiconductor pillars comprises:
forming a sidewall protective layer on the sidewall of the semiconductor pillar;
forming a barrier layer on the sidewall protective layer; and
partially etching the sidewall protective layer to expose upper and middle portion of the semiconductor pillar;
wherein the gate barrier layer and the gate metal layer are formed on the middle portion of the semiconductor pillar.
12. The method for fabricating the semiconductor structure according to claim 11 , wherein
the gate barrier layer is formed on the upper sidewall and the middle sidewall of the semiconductor pillar, and wherein the gate metal layer is formed on the gate barrier layer, wherein the method further comprises removing the gate metal layer from the upper sidewall of the gate barrier layer, and removing the gate barrier layer from the upper sidewall of the semiconductor pillar, wherein a remaining gate barrier layer and the gate metal layer are used as the gate electrode.
13. The method for fabricating the semiconductor structure according to claim 11 , wherein
before the doping implantation is performed on the upper portion and the lower portion of the semiconductor pillar, the method further comprises:
removing the sidewall protective layer and the gate barrier layer.
14. The method for fabricating the semiconductor structure according to claim 13 , wherein
the sidewall protective layer and the gate barrier layer are removed by an ion beam etching process.
15. The method for fabricating the semiconductor structure according to claim 11 , wherein
forming the sidewall protective layer comprises:
forming an initial protective layer on the substrate, wherein the initial protective layer buries the semiconductor pillar; and
removing a part of the initial protective, wherein the initial protective layer covering the semiconductor pillar serves as the sidewall protective layer.
16. The method for fabricating the semiconductor structure according to claim 15 , wherein
after performing doping implantation on the upper portions and the lower portions of the semiconductor pillar, the method further comprises:
forming a termination protective layer between the semiconductor pillar to bury the semiconductor pillar and the gate electrodes;
wherein, the termination protective layer is located on the initial protection layer on the lower portions of the semiconductor pillars.
17. A semiconductor structure, fabricated by the method according to claim 1 .