IP Library Granted Patent US 12,346,478
Granted Patent B2
US 12,346,478 · App. 18/552,075 · Granted Jul 1, 2025

Secure computation system, secure computation apparatus, method, and program

Inventors: Atsunori Ichikawa (Tokyo, JP); Koki Hamada (Tokyo, JP)
Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
G06F21/6245G06F7/582
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Quick Facts
Patent No.
US 12,346,478
App. No.
18/552,075
Granted
Jul 1, 2025
Kind
B2
Abstract

A secure computation system includes first, second, and third secure-computation-apparatuses each having a tripartite-share of a concealed input vector. The first secure-computation-apparatus converts its tripartite-share into a bipartite-share with the third secure-computation-apparatus; calculates a third vector obtained by subtracting a second permutation of a first vector and a second vector from its permutation of its bipartite-share; and transmits the third vector and the second permutation to the second secure-computation-apparatus. The third secure-computation-apparatus converts its tripartite-share into a bipartite-share with the first secure-computation-apparatus; calculates a fourth vector obtained by adding the first vector to a first permutation of its bipartite-share; transmits the fourth vector to the third secure-computation-apparatus: set the second vector as a bipartite-share with the second secure-computation-apparatus. The second secure-computation-apparatus sets a vector obtained by adding the second permutation of the fourth vector to the third vector, as a bipartite-share with the third secure-computation-apparatus.

Claims (66)

1. A secure computation system including a first secure computation apparatus, a second secure computation apparatus, and a third secure computation apparatus each having a tripartite share of a concealed input vector,

wherein the first secure computation apparatus includes

a processor; and

a memory storing program instructions that cause the processor to:

convert its own tripartite share into a bipartite share with the third secure computation apparatus;

calculate a third vector obtained by subtracting, from a result of applying its own permutation to its own bipartite share, a result of applying a second permutation determined according to the permutation to a first vector determined by a predetermined method and a second vector determined by a predetermined method; and

transmit the third vector and the second permutation to the second secure computation apparatus,

the third secure computation apparatus includes

a processor; and

a memory storing program instructions that cause the processor to

convert its own tripartite share into a bipartite share with the first secure computation apparatus;

calculate a fourth vector obtained by adding the first vector to a result of applying a first permutation determined according to the permutation to its own bipartite share;

transmit the fourth vector to the third secure computation apparatus;

set the second vector as a bipartite share, with the second secure computation apparatus, of a result of applying the permutation to the input vector, and

the second secure computation apparatus includes

a processor; and

a memory storing program instructions that cause the processor to set a vector obtained by adding a result of applying the second permutation to the fourth vector to the third vector, as a bipartite share, with the third secure computation apparatus, of the result of applying the permutation to the input vector.

2. The secure computation system according to claim 1 ,

wherein the processor of the first secure computation apparatus is further configured to:

randomly determine the first permutation and the second permutation such that synthetic mapping between the first permutation and the second permutation is the permutation; and

randomly determine the first vector and the second vector having the same size as its own bipartite share, and

the processor of the first secure computation apparatus transmits the first permutation, the first vector, and the second vector to the third secure computation apparatus.

3. The secure computation system according to claim 1 ,

wherein the processor of the first secure computation apparatus is further configured to:

determine the first permutation, the first vector, and the second vector, using a pseudo-random number generator shared with the third secure computation apparatus and input data to the pseudo-random number generator; and

determine synthesis mapping between inverse mapping of the first permutation and the permutation as the second permutation, and

the processor of the third secure computation apparatus is further configured to determine the first permutation, the first vector, and the second vector, using a pseudo-random number generator shared with the first secure computation apparatus and input data to the pseudo-random number generator.

4. The secure computation system according to claim 1 ,

wherein the first secure computation apparatus, the second secure computation apparatus, and the third secure computation apparatus share a pseudo-random function capable of secure computation, and

the processor of the first secure computation apparatus is further configured to:

generate a tripartite share of a random number through random share generation between the second secure computation apparatus and the third secure computation apparatus;

calculate a tripartite share of a vector of a value of the pseudo-random function with the tripartite share of the random number and each of predetermined tripartite shares included in each element of the input vector as inputs through secure computation between the second secure computation apparatus and the third secure computation apparatus;

restore the vector of the value of the pseudo-random function, using the tripartite share of the vector of the value of the pseudo-random function transmitted from the second secure computation apparatus or the third secure computation apparatus and its own tripartite share of the vector of the value of the pseudo-random function; and

receive the vector of the value of the pseudo-random function as an input and generate the permutation, using a predetermined mechanism.

5. The secure computation system according to claim 4 ,

wherein the processor of the second secure computation apparatus is further configured to:

calculate a tripartite share of the value of the pseudo-random function with the tripartite share of the random number and a tripartite share of a search key for the input vector as inputs through secure computation between the first secure computation apparatus and the third secure computation apparatus;

transmit its own tripartite share of the value of the pseudo-random function to the third secure computation apparatus;

restore the value of the pseudo-random function, using the tripartite share of the value of the pseudo-random function transmitted from the third secure computation apparatus and its own tripartite share of the value of the pseudo-random function; and

generate a value indicating a reference position for a bipartite share, with the third secure computation apparatus, of the result of applying the permutation to the input vector, using the mechanism with the value of the pseudo-random function as an input, and

the processor of the third secure computation apparatus is further configured to:

calculate the tripartite share of the value of the pseudo-random function with the tripartite share of the random number and the tripartite share of the search key for the input vector as inputs through secure computation between the first secure computation apparatus and the second secure computation apparatus;

transmit its own tripartite share of the value of the pseudo-random function to the second secure computation apparatus;

restore the value of the pseudo-random function, using the tripartite share of the value of the pseudo-random function transmitted from the second secure computation apparatus and its own tripartite share of the value of the pseudo-random function; and

generate a value indicating a reference position for a bipartite share, with the second secure computation apparatus, of the result of applying the permutation to the input vector, using the mechanism with the value of the pseudo-random function as an input.

6. A secure computation apparatus sharing a tripartite share of a concealed input vector between a first secure computation apparatus and a second other secure computation apparatus, the secure computation apparatus comprising:

a processor; and

a memory storing program instructions that cause the processor to:

convert its own tripartite share into a bipartite share with the second secure computation apparatus;

randomly determine a first permutation and a second permutation such that synthetic mapping between the first permutation and the second permutation is its own permutation;

randomly determine a first vector and a second vector having the same size as its own bipartite share;

calculate a third vector obtained by subtracting a result of applying the second permutation to the first vector, and the second vector from a result of applying the permutation to its own bipartite share;

transmit the third vector and the second permutation to the first secure computation apparatus; and

transmit the first permutation, the first vector, and the second vector to the second secure computation apparatus.

7. A method for use in a secure computation system including a first secure computation apparatus, a second secure computation apparatus, and a third secure computation apparatus each having a tripartite share of a concealed input vector,

wherein the first secure computation apparatus executes

converting its own tripartite share into a bipartite share with the third secure computation apparatus;

calculating a third vector obtained by subtracting, from a result of applying its own permutation to its own bipartite share, a result of applying a second permutation determined according to the permutation to a first vector determined by a predetermined method and a second vector determined by a predetermined method; and

transmitting the third vector and the second permutation to the second secure computation apparatus,

the third secure computation apparatus executes

converting its own tripartite share into a bipartite share with the first secure computation apparatus;

calculating a fourth vector obtained by adding the first vector to a result of applying a first permutation determined according to the permutation to its own bipartite share;

transmitting the fourth vector to the third secure computation apparatus;

setting the second vector as a bipartite share with the second secure computation apparatus of a result of applying the permutation to the input vector, and

the second secure computation apparatus executes setting a vector obtained by adding a result of applying the second permutation to the fourth vector to the third vector, as a bipartite share with the third secure computation apparatus of the result of applying the permutation to the input vector.

8. A non-transitory computer-readable recording medium having stored therein a program for causing a computer to perform the method according to claim 7 .

Assignments (2)
CHANGE OF NAME Recorded Aug 15, 2025
From: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
To: NTT, INC.
Reel/Frame 072473/0885 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2023
From: ICHIKAWA, ATSUNORI; HAMADA, KOKI
To: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
Reel/Frame 064998/0776 →
Continuity (1)
Related Publication 20240176908A1 · May 30, 2024
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