IP Library Granted Patent US 12,349,288
Granted Patent B2
US 12,349,288 · App. 18/098,578 · Granted Jul 1, 2025

Circuit board including a core layer provided with plurality of insulating layers

Inventors: Myung Jae Kwon (Seoul, KR); Sang Hyuck Nam (Seoul, KR); Jin Hyoung Park (Seoul, KR)
Assignee: LG INNOTEK CO., LTD.
H05K3/4644H05K1/115H05K3/427H05K2201/0959
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Quick Facts
Patent No.
US 12,349,288
App. No.
18/098,578
Granted
Jul 1, 2025
Kind
B2
Abstract

A semiconductor package according to an embodiment includes a first insulating layer including a through hole; an insulating member disposed in the through hole of the first insulating layer; a first electrode layer disposed on the insulating member; a second insulating layer disposed on the first electrode layer; and a first through electrode passing through the second insulating layer, wherein the first through electrode overlaps the first electrode layer and the insulating member in a vertical direction.

Claims (37)

1. A circuit board comprising:

a first insulating layer including a through hole;

an insulating member disposed in the through hole of the first insulating layer;

a first through electrode disposed in the through hole of the first insulating layer and surrounding at least a part of the insulating member;

a first electrode layer disposed on the insulating member and the first through electrode;

a second insulating layer disposed on the first electrode layer; and

a second through electrode passing through the second insulating layer,

wherein the second through electrode overlaps the first electrode layer and the insulating member in a vertical direction,

wherein the first electrode layer includes a first region overlapping the first insulating layer in the vertical direction, and a second region overlapping the insulating member in the vertical direction, and

wherein a thickness of the first region of the first electrode layer is different from a thickness of the second region of the first electrode layer.

2. The circuit board of claim 1 , further comprising:

a second electrode layer disposed under the insulating member and the first through electrode;

a third insulating layer under disposed under the second electrode layer; and

a third through electrode passing through the third insulating layer, and

wherein the third through electrode overlaps the first electrode layer, the second electrode layer, the second through electrode and the insulating member in the vertical direction.

3. The circuit board of claim 2 ,

wherein the second electrode layer includes a fourth region overlapping the first insulating layer in the vertical direction, and a fifth region overlapping the insulating member in the vertical direction, and

wherein a thickness of the fourth region of the second electrode layer is different from a thickness of the fifth region of the second electrode layer.

4. The circuit board of claim 1 , wherein the thickness of the first region of the first electrode layer is greater than the thickness of the second region of the first electrode layer.

5. The circuit board of claim 1 , wherein the first electrode layer further includes a third region provided between the first region and the second region and overlapping the first through electrode in the vertical direction, and

wherein a thickness of the third region of the first electrode layer is greater than the thickness of the second region.

6. The circuit board of claim 1 , wherein an upper surface of the insulating member is positioned higher than an upper surface of the first insulating layer.

7. The circuit board of claim 1 , wherein the first electrode layer includes:

a first metal layer disposed on an upper surface of the first insulating layer; and

a second metal layer disposed on the first metal layer and the first through electrode.

8. The circuit board of claim 7 , wherein a thickness of the first region of the second metal layer of the first electrode layer is different from a thickness of the second region of the second metal layer of the first electrode layer, and

wherein a lower surface of the second metal layer includes a concave portion concave toward the insulating member.

9. The circuit board of claim 1 , wherein the first insulating layer includes a copper clad laminate (CCL).

10. The circuit board of claim 9 , wherein the first insulating layer has a thickness ranging from 80 μm to 150 μm.

11. The circuit board of claim 3 ,

wherein the thickness of the fourth region of the second electrode layer is greater than the thickness of the fifth region of the second electrode layer.

12. The circuit board of claim 3 , wherein the second insulating layer or the third insulating layer includes any one of prepreg and ABF (Ajinomoto Build-up Film).

13. The circuit board of claim 3 , wherein the first insulating layer, the second insulating layer and the third insulating layer are core layers of the circuit board.

14. The circuit board of claim 13 , wherein the first through electrode, the first electrode layer, the second through electrode, the second electrode layer, and the third through electrode are a core through electrode passing through an upper surface and a lower surface of the core layers.

15. The circuit board of claim 13 , wherein the second through electrode is not disposed in a region of the second insulating layer that does not vertically overlap the first through electrode.

16. The circuit board of claim 5 , wherein an inclination of a side surface of the second through electrode is perpendicular to an upper surface or a lower surface of the first insulating layer.

17. The circuit board of claim 9 , wherein a shape of the first through electrode is different from a shape of the second through electrode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2023
From: KWON, MYUNG JAE; NAM, SANG HYUCK; PARK, JIN HYOUNG
To: LG INNOTEK CO., LTD.
Reel/Frame 062429/0456 →
Priority Claims (1)
KR 10-2022-0007505 · Jan 18, 2022 · national
Continuity (1)
Related Publication 20230232544A1 · Jul 20, 2023
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