IP Library Granted Patent US 12,349,390
Granted Patent B2
US 12,349,390 · App. 17/918,577 · Granted Jul 1, 2025

Semiconductor device

Inventors: Marika Nakamura (Tokyo, JP); Shigeyoshi Usami (Tokyo, JP); Yuki Takiguchi (Tokyo, JP); Takahiro Yamada (Tokyo, JP); Hisashi Saito (Tokyo, JP); Tatsuro Watahiki (Tokyo, JP); Eiji Yagyu (Tokyo, JP)
Assignee: MITSUBISHI ELECTRIC CORPORATION
H10D30/475H10D62/824H10D64/513H10D64/64H10D62/8503
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Quick Facts
Patent No.
US 12,349,390
App. No.
17/918,577
Granted
Jul 1, 2025
Kind
B2
Abstract

A first nitride semiconductor layer and a second nitride semiconductor layer are laminated in a first direction. The first and second nitride semiconductor layers form a heterojunction, and a two-dimensional carrier gas is induced in the first nitride semiconductor layer. A drain electrode is opposite to a source electrode via gate electrode in a third direction. The source electrode and the drain electrode conduct with the first nitride semiconductor layer. The first and second nitride semiconductor layers form a Schottky junction with the gate electrode. A first layer is located between the gate electrode and the drain electrode in the third direction and is in contact with the gate electrode, and is in contact with the second nitride semiconductor layer in a second direction. The first layer suppresses induction of the two-dimensional carrier gas in the first nitride semiconductor layer opposite to the first layer in the first direction.

Claims (50)

1. A semiconductor device comprising:

a semiconductor layer group including a first nitride semiconductor layer and a second nitride semiconductor layer laminated in a first direction;

a plurality of gate electrodes, each of which being in contact with the second nitride semiconductor layer in a second direction different from the first direction and is arranged along the second direction;

a conductor electrically connecting the plurality of gate electrodes and located away from the semiconductor layer group;

a source electrode opposite to the plurality of gate electrodes in a third direction different from both the first direction and the second direction and conducting with the first nitride semiconductor layer;

a drain electrode opposite to the source electrode via the plurality of gate electrodes in the third direction and conducting with the first nitride semiconductor layer; and

a first layer located between the plurality of gate electrodes and the drain electrode in the third direction and in contact with the plurality of gate electrodes, and in contact with the second nitride semiconductor layer in the second direction, wherein

the first nitride semiconductor layer and the second nitride semiconductor layer form a heterojunction, and a two-dimensional carrier gas is induced in the first nitride semiconductor layer,

the first nitride semiconductor layer and the second nitride semiconductor layer form a Schottky junction with each of the plurality of gate electrodes, and

the first layer is any of an insulator, an intrinsic semiconductor, and a semiconductor having a conductivity type opposite to that of the second nitride semiconductor layer, and suppresses induction of the two-dimensional carrier gas in the first nitride semiconductor layer opposite to the first layer in the first direction.

2. The semiconductor device according to claim 1 , wherein

the first layer is in contact with the drain electrode.

3. The semiconductor device according to claim 1 , wherein

a length of the first layer is shorter than a distance between the plurality of gate electrodes and the drain electrode in the third direction.

4. The semiconductor device according to claim 1 , wherein

a length of the first layer in the second direction decreases as it is away from the plurality of gate electrodes along the third direction.

5. The semiconductor device according to claim 1 , wherein

a length of the first layer in the first direction decreases as it is away from the plurality of gate electrodes along the third direction.

6. The semiconductor device according to claim 1 , further comprising

a second layer located between the plurality of gate electrodes and the source electrode in the third direction and in contact with the plurality of gate electrodes, wherein

the second layer is any of an insulator, an intrinsic semiconductor, and a semiconductor having a conductivity type opposite to that of the second nitride semiconductor layer, and suppresses induction of the two-dimensional carrier gas in the first nitride semiconductor layer opposite to the second layer in the first direction.

7. The semiconductor device according to claim 6 , wherein

the second layer is a semiconductor having a conductivity type opposite to that of the second nitride semiconductor layer.

8. The semiconductor device according to claim 6 , wherein

the second layer is in contact with the source electrode.

9. The semiconductor device according to claim 6 , wherein

a length of the second layer is shorter than a distance between the plurality of gate electrodes and the source electrode in the third direction.

10. The semiconductor device according to claim 6 , wherein

a length of the second layer in the second direction increases as it nears the plurality of gate electrodes along the third direction.

11. The semiconductor device according to claim 6 , wherein

a length of the second layer in the first direction increases as it nears the plurality of gate electrodes along the third direction.

12. The semiconductor device according to claim 1 , wherein

permittivity of the first layer decreases toward the third direction.

13. The semiconductor device according to claim 6 , wherein

permittivity of the second layer decreases toward a direction opposite to the third direction.

14. The semiconductor device according to claim 1 , further comprising

a third layer located between the plurality of gate electrodes and the first nitride semiconductor layer in the first direction and in contact with the plurality of gate electrodes, wherein

the third layer is an insulator or a semiconductor having a conductivity type opposite to that of the second nitride semiconductor layer.

15. The semiconductor device according to claim 1 , wherein

the semiconductor layer group includes a plurality of the first nitride semiconductor layers and a plurality of the second nitride semiconductor layers alternately laminated in the first direction.

16. The semiconductor device according to claim 1 , wherein

each of the plurality of gate electrodes extends through the second nitride semiconductor layer and is in contact with the first nitride semiconductor layer.

17. The semiconductor device according to claim 1 , wherein

the first layer extends through the second nitride semiconductor layer and is in contact with the first nitride semiconductor layer.

18. The semiconductor device according to claim 17 , wherein

the first layer exists on the opposite side of the first direction from a position of the induced two-dimensional carrier gas in the first direction.

19. The semiconductor device according to claim 6 , wherein

the second layer extends through the second nitride semiconductor layer and is in contact with the first nitride semiconductor layer.

20. The semiconductor device according to claim 19 , wherein

the second layer exists on the opposite side of the first direction from a position of the induced two-dimensional carrier gas in the first direction.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 14, 2022
From: NAKAMURA, MARIKA; USAMI, SHIGEYOSHI; TAKIGUCHI, YUKI; YAMADA, TAKAHIRO; SAITO, HISASHI; WATAHIKI, TATSURO; YAGYU, EIJI
To: MITSUBISHI ELECTRIC CORPORATION
Reel/Frame 061421/0001 →
Priority Claims (1)
JP 2020-097551 · Jun 4, 2020 · national
Continuity (1)
Related Publication 20230143585A1 · May 11, 2023
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