IP Library Granted Patent US 12,355,562
Granted Patent B2
US 12,355,562 · App. 18/048,809 · Granted Jul 8, 2025

Channel reencoding to reduce invalid physical downlink control channel signals

Inventors: Jiancao Hou (Surbiton, GB); Wei Li (Stevenage, GB); Matthew David Brown (Hants, GB); Chi-ming Leung (Hardwick, GB)
Assignee: VIAVI Solutions Inc.
H04L1/0038H04L1/208H04L1/24H03M13/13H03M13/3776H04L1/0054H04L1/0061
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Quick Facts
Patent No.
US 12,355,562
App. No.
18/048,809
Granted
Jul 8, 2025
Kind
B2
Abstract

A device may receive a PDCCH signal, may decode encoded bits of the PDCCH signal to generate coded bits, may reencode the coded bits, and may calculate a detection error probability of each coded bit at an output of soft demodulation. The device may calculate a channel decoding error probability that cyclic redundancy check bits are still attached to the coded bits, and may calculate an error probability of channel reencoding, of each coded bit, due to error propagation of polar decoding and reencoding. The device may calculate a probability density of a BMR associated with the coded bits, and may calculate a threshold based on the detection error probability, the channel decoding error probability, the error probability of channel reencoding, and the probability density of a BMR. The device may determine that the PDCCH signal is invalid based on the BMR being greater than the threshold.

Claims (86)

1. A method, comprising:

receiving, by a device, a physical downlink control channel (PDCCH) signal from a base station;

providing, by the device, the PDCCH signal to a special-purpose processor of the device;

decoding, by the special-purpose processor, encoded bits of the PDCCH signal to generate coded bits;

reencoding, by the special-purpose processor, the coded bits;

calculating, by the device, a detection error probability of each coded bit at an output of soft demodulation;

calculating, by the device, a channel decoding error probability that cyclic redundancy check bits are still attached to the coded bits;

calculating, by the device, an error probability of channel reencoding, of each coded bit of the coded bits, due to error propagation of polar decoding and reencoding;

calculating, by the device, a probability density of a bit mismatch ratio associated with the coded bits;

calculating, by the device, a threshold based on the detection error probability, the channel decoding error probability, the error probability of channel reencoding, and the probability density of a bit mismatch ratio;

determining, by the special-purpose processor, whether the bit mismatch ratio associated with the coded bits is greater than the threshold; and

performing, by the device, one or more actions based on determining whether the bit mismatch ratio associated with the coded bits is greater than the threshold.

2. The method of claim 1 , wherein performing the one or more actions comprises:

determining that the PDCCH signal is invalid based on the bit mismatch ratio being greater than the threshold.

3. The method of claim 2 , further comprising:

discarding the coded bits based on determining that the PDCCH signal is invalid.

4. The method of claim 1 , wherein performing the one or more actions comprises:

determining that the PDCCH signal is valid based on the bit mismatch ratio not being greater than the threshold.

5. The method of claim 4 , further comprising:

causing the special-purpose processor to provide the PDCCH signal to a general-purpose processor of the device, based on the PDCCH signal being valid; and

causing the general-purpose processor to perform a downlink control information validation of the PDCCH signal.

6. The method of claim 5 , wherein the downlink control information validation of the PDCCH signal includes radio network temporary identifier demasking and cyclic redundancy check checking of the PDCCH signal.

7. The method of claim 1 , wherein calculating the detection error probability of each coded bit at the output of soft demodulation comprises:

generating a column vector based on the coded bits;

calculating a log-likelihood of the column vector to generate a log-likelihood result; and

calculating a probability density function of the log-likelihood result to generate the detection error probability.

8. A device, comprising:

one or more memories; and

one or more processors, coupled to the one or more memories, configured to:

receive a physical downlink control channel (PDCCH) signal from a base station;

provide the PDCCH signal to a special-purpose processor of the device;

decode encoded bits of the PDCCH signal to generate coded bits;

reencode the coded bits;

calculate a detection error probability of each coded bit at an output of soft demodulation;

calculate a channel decoding error probability that cyclic redundancy check bits are still attached to the coded bits;

calculate an error probability of channel reencoding, of each coded bit of the coded bits, due to error propagation of polar decoding and reencoding;

calculate a probability density of a bit mismatch ratio associated with the coded bits;

calculate a threshold based on the detection error probability, the channel decoding error probability, the error probability of channel reencoding, and the probability density of a bit mismatch ratio;

determine whether the bit mismatch ratio associated with the coded bits is greater than the threshold;

determine that the PDCCH signal is invalid based on the bit mismatch ratio being greater than the threshold; and

discard the coded bits based on determining that the PDCCH signal is invalid.

9. The device of claim 8 , wherein the one or more processors, to calculate the channel decoding error probability that cyclic redundancy check bits are still attached to the coded bits, are configured to:

utilize a Gaussian approximation to calculate the channel decoding error probability.

10. The device of claim 8 , wherein the one or more processors, to calculate the error probability of channel reencoding, of each coded bit of the coded bits, due to error propagation of polar decoding and reencoding, are configured to:

create a generator matrix based on the coded bits;

extract rows from the generator matrix to create a submatrix; and

calculate the error probability of channel reencoding based on the submatrix.

11. The device of claim 8 , wherein the one or more processors, to calculate the probability density of the bit mismatch ratio associated with the coded bits, are configured to:

create a binary matrix based on the coded bits; and

calculate the probability density based on the binary matrix.

12. The device of claim 8 , wherein the one or more processors, to calculate the probability density of the bit mismatch ratio associated with the coded bits, are configured to:

calculate the probability density of the bit mismatch ratio based on the detection error probability, the channel decoding error probability, and the error probability of channel reencoding,

wherein the probability density corresponds to the threshold.

13. The device of claim 8 , wherein the threshold is a bit mismatch ratio threshold.

14. The device of claim 8 , wherein the device is a multi-user-equipment emulator testing device.

15. A non-transitory computer-readable medium storing a set of instructions, the set of instructions comprising:

one or more instructions that, when executed by one or more processors of a device, cause the device to:

receive a physical downlink control channel (PDCCH) signal from a base station;

provide the PDCCH signal to a special-purpose processor of the device;

decode encoded bits of the PDCCH signal to generate coded bits;

reencode the coded bits;

calculate a detection error probability of each coded bit at an output of soft demodulation;

calculate a channel decoding error probability that cyclic redundancy check bits are still attached to the coded bits;

calculate an error probability of channel reencoding, of each coded bit of the coded bits, due to error propagation of polar decoding;

calculate a probability density of a bit mismatch ratio associated with the coded bits based on the detection error probability, the channel decoding error probability, and the error probability of channel reencoding,

wherein the probability density corresponds to a threshold;

determine whether the bit mismatch ratio associated with the coded bits is greater than the threshold; and

perform one or more actions based on determining whether the bit mismatch ratio associated with the coded bits is greater than the threshold.

16. The non-transitory computer-readable medium of claim 15 , wherein the one or more instructions, that cause the device to perform the one or more actions, cause the device to:

determine that the PDCCH signal is invalid based on the bit mismatch ratio being greater than the threshold; and

discard the coded bits based on determining that the PDCCH signal is invalid.

17. The non-transitory computer-readable medium of claim 15 , wherein the one or more instructions, that cause the device to perform the one or more actions, cause the device to:

determine that the PDCCH signal is valid based on the bit mismatch ratio not being greater than the threshold;

cause the special-purpose processor to provide the PDCCH signal to a general-purpose processor of the device, based on the PDCCH signal being valid; and

cause the general-purpose processor to perform a downlink control information validation of the PDCCH signal,

wherein the downlink control information validation of the PDCCH signal includes radio network temporary identifier demasking and cyclic redundancy check checking of the PDCCH signal.

18. The non-transitory computer-readable medium of claim 15 , wherein the one or more instructions, that cause the device to calculate the detection error probability of each coded bit at the output of soft demodulation, cause the device to:

generating a column vector based on the coded bits;

calculate a log-likelihood of the column vector to generate a log-likelihood result; and

calculate a probability density function of the log-likelihood result to generate the detection error probability.

19. The non-transitory computer-readable medium of claim 15 , wherein the one or more instructions, that cause the device to calculate the channel decoding error probability that cyclic redundancy check bits are still attached to the coded bits, cause the device to:

utilize a Gaussian approximation to calculate the channel decoding error probability.

20. The non-transitory computer-readable medium of claim 15 , wherein the one or more instructions, that cause the device to calculate the error probability of channel reencoding, of each coded bit of the coded bits, due to error propagation of polar decoding and reencoding, cause the device to:

create a generator matrix based on the coded bits;

extract rows from the generator matrix to create a submatrix; and

calculate the error probability based on the submatrix.

Assignments (4)
RELEASE OF SECURITY INTEREST AT REEL/FRAME 73189/0873 Recorded May 28, 2026
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
To: INERTIAL LABS, INC.; VIAVI SOLUTIONS INC.; VIAVI SOLUTIONS LICENSING LLC
Reel/Frame 075642/0381 →
SECURITY INTEREST Recorded Nov 14, 2025
From: VIAVI SOLUTIONS INC.; VIAVI SOLUTIONS LICENSING LLC; INERTIAL LABS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS AGENT
Reel/Frame 073571/0137 →
SECURITY AGREEMENT Recorded Oct 21, 2025
From: INERTIAL LABS, INC.; VIAVI SOLUTIONS INC.; VIAVI SOLUTIONS LICENSING LLC
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
Reel/Frame 073189/0873 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 24, 2022
From: HOU, JIANCAO; LI, WEI; BROWN, MATTHEW DAVID; LEUNG, CHI-MING
To: VIAVI SOLUTIONS INC.
Reel/Frame 061512/0391 →
Continuity (2)
Related Publication 20240137153A1 · Apr 25, 2024
Related Publication 20240235734A9 · Jul 11, 2024
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