Semiconductor devices including capacitor and methods of manufacturing the semiconductor devices
Semiconductor devices including a capacitor and methods of forming the same are provided. The semiconductor devices may include a capacitor that include a lower electrode, an upper electrode on the lower electrode, and a dielectric layer extending between the lower electrode and the upper electrode. The lower electrode may include a doped region that contacts the dielectric layer, and the doped region of the lower electrode is configured to increase a capacitance of the capacitor.
1. A semiconductor device comprising:
a substrate;
a lower electrode that extends in a vertical direction on the substrate;
a dielectric layer on an upper surface of the lower electrode; and
an upper electrode on the dielectric layer,
wherein the lower electrode comprises a doped region that contacts the dielectric layer,
wherein a dopant concentration in the doped region of the lower electrode is highest adjacent to an interface between the doped region of the lower electrode and the dielectric layer.
2. The semiconductor device of claim 1 , wherein the doped region of the lower electrode comprises niobium (Nb).
3. The semiconductor device of claim 1 , wherein the lower electrode has a cylindrical shape.
4. The semiconductor device of claim 1 , wherein the dopant concentration in the doped region of the lower electrode decreases as a distance from the dielectric layer increases.
5. The semiconductor device of claim 1 , wherein the doped region of the lower electrode is configured to change a crystal phase ratio of the dielectric layer.
6. The semiconductor device of claim 1 further comprising a supporting layer that contacts a side wall of the lower electrode.
7. The semiconductor device of claim 6 , wherein an upper surface of the supporting layer is coplanar with the upper surface of the lower electrode.
8. The semiconductor device of claim 6 , wherein the doped region contacts at least a portion of the supporting layer.
9. The semiconductor device of claim 6 , wherein the doped region covers a side wall of the supporting layer entirely.
10. The semiconductor device of claim 1 , further comprising:
a supporting layer configured to support the lower electrode; and
a residual layer between a side wall of the lower electrode and the supporting layer.
11. The semiconductor device of claim 10 , wherein the residual layer and dopants of the doped region of the lower electrode comprise the same chemical element.
12. The semiconductor device of claim 10 , wherein the residual layer comprises niobium nitride (NbN).
13. The semiconductor device of claim 1 , wherein the dielectric layer comprises hafnium oxide (HfO 2 ), zirconium oxide (ZrO 2 ), aluminum oxide (Al 2 O 3 ), lanthanum oxide (La 2 O 3 ), tantalum oxide (Ta 2 O 3 ), titanium oxide (TiO 2 ), or a combination thereof.
14. The semiconductor device of claim 1 , wherein the doped region further comprises:
a first doped region that extends along a side wall of the lower electrode; and
a second doped region that extends along the upper surface of the lower electrode.
15. The semiconductor device of claim 14 , wherein the first doped region is separated from the second doped region.
16. The semiconductor device of claim 1 , wherein the doped region further comprising:
a first doped region that extends along a side wall of the lower electrode; and
a second doped region that extends along an lower surface of the lower electrode.
17. The semiconductor device of claim 16 further comprising a residual layer that contacts the lower surface of the lower electrode.
18. The semiconductor device of claim 17 , wherein the residual layer and dopants of the doped region of the lower electrode comprise the same chemical element.
19. The semiconductor device of claim 17 , wherein the residual layer comprises niobium nitride (NbN).
20. The semiconductor device of claim 1 , wherein the lower electrode comprises titanium nitride (TiN), tungsten nitride (WN), tantalum nitride (TaN), or molybdenum nitride (MoN).