Granted Patent B2

US 12,363,475 · App. 17/699,902 · Granted Jul 15, 2025

Inventors: Subbarao Surendra Chakkirala (San Jose, CA); Sherif Galal (Irvine, CA); Earl Schreyer (Raleigh, NC)

Assignee: QUALCOMM Incorporated

H04R3/00H02M1/14H02M3/156

Abstract

Claims (70)

1. A method of supplying power, comprising:

converting an input voltage to an output voltage with a boost converter, to power a load for the boost converter;

adaptively adjusting an input current limit for the boost converter based on an estimated output power for the boost converter; and

applying the input current limit to the boost converter during the converting, wherein:

the load comprises an amplifier;

the estimated output power is determined based on a power level and a frequency content of an input signal to be amplified by the amplifier;

if the input signal comprises relatively high frequencies, the input current limit is based on an averaged predicted output power for the boost converter; and

if the input signal comprises relatively low frequencies, the input current limit is based on an estimated instantaneous peak output power for the boost converter.

2. The method of claim 1 , further comprising determining an averaged predicted output power for the boost converter as the estimated output power.

3. The method of claim 1 , further comprising sensing the input voltage, wherein the input current limit is adaptively adjusted based on the estimated output power for the boost converter and the input voltage.

4. The method of claim 1 , further comprising:

sensing the input voltage of the boost converter;

determining a mean squared value of the input signal;

calculating the estimated output power based on the mean squared value of the input signal, a gain of the amplifier, and a resistance of the load;

dividing the estimated output power by an efficiency of at least one of the boost converter or the load to generate an estimated input power; and

determining the input current limit by dividing the estimated input power by the input voltage.

5. The method of claim 4 , wherein determining the input current limit further comprises adding a ripple value to a result of dividing the estimated input power by the input voltage.

6. The method of claim 4 , wherein determining the mean squared value comprises:

filtering the input signal; and

determining the mean squared value of the filtered input signal as the mean squared value of the input signal.

7. The method of claim 4 , further comprising:

delaying the input signal with a delay time;

amplifying the delayed input signal with the amplifier; and

holding the input current limit based on the delay time before applying the input current limit to the boost converter.

8. The method of claim 1 , wherein the amplifier comprises a speaker driver and wherein the input signal comprises an audio signal.

9. The method of claim 1 , wherein the input current limit is higher when the input signal comprises relatively low frequencies and is lower when the input signal comprises relatively high frequencies.

10. The method of claim 1 , further comprising bounding the input current limit, before applying the input current limit to the boost converter, to at least one of a maximum input current limit ceiling or a minimum input current limit floor.

11. A circuit for supplying power to a load, comprising:

a boost converter having an output coupled to the load; and

logic configured to:

adaptively adjust an input current limit for the boost converter based on an estimated output power for the boost converter; and

apply the input current limit to the boost converter, wherein the boost converter comprises:

a transistor;

a current-sensing circuit having an input coupled to a branch of the boost converter with the transistor; and

a comparator having a first input coupled to an output of the current-sensing circuit, having a second input coupled to an output of the logic configured to provide the input current limit, and having an output coupled to a control input of the transistor.

12. The circuit of claim 11 , wherein the logic is further configured to determine an averaged predicted output power for the boost converter as the estimated output power.

13. The circuit of claim 11 , further comprising an analog-to-digital converter configured to sample an input voltage of the boost converter, wherein the logic is configured to adaptively adjust the input current limit based on the estimated output power for the boost converter and the input voltage.

14. The circuit of claim 11 , wherein the load comprises an amplifier configured to amplify an input signal and wherein the estimated output power is determined based on a power level and a frequency content of the input signal to be amplified by the amplifier.

15. The circuit of claim 14 , wherein:

if the input signal comprises relatively high frequencies, the input current limit is based on an averaged predicted output power for the boost converter; and

if the input signal comprises relatively low frequencies, the input current limit is based on an estimated instantaneous peak output power for the boost converter.

16. The circuit of claim 14 , further comprising an analog-to-digital converter configured to sample an input voltage of the boost converter, wherein to adaptively adjust the input current limit, the logic is configured to:

determine a mean squared value of the input signal;

calculate the estimated output power based on the mean squared value of the input signal, a gain of the amplifier, and a resistance of the load;

divide the estimated output power by an efficiency of at least one of the boost converter or the load to generate an estimated input power; and

determine the input current limit by dividing the estimated input power by the sampled input voltage.

17. The circuit of claim 16 , wherein to determine the input current limit, the logic is further configured to add a ripple value to a result of dividing the estimated input power by the input voltage.

18. The circuit of claim 16 , wherein to determine the mean squared value, the logic is configured to:

filter the input signal; and

determine the mean squared value of the filtered input signal as the mean squared value of the input signal.

19. The circuit of claim 16 , further comprising a delay element configured to delay the input signal with a delay time, wherein the amplifier is configured to amplify the delayed input signal and wherein the logic is further configured to hold the input current limit based on the delay time before applying the input current limit to the boost converter.

20. The circuit of claim 14 , wherein the amplifier comprises a speaker driver and wherein the input signal comprises an audio signal.

21. The circuit of claim 14 , wherein the input current limit is higher when the input signal comprises relatively low frequencies and is lower when the input signal comprises relatively high frequencies.

22. The circuit of claim 11 , wherein the logic is further configured to bound the input current limit, before applying the input current limit to the boost converter, to at least one of a maximum input current limit ceiling or a minimum input current limit floor.

23. An apparatus for supplying power, comprising:

means for converting an input voltage to an output voltage, to power a load for the means for converting, wherein the output voltage is greater than the input voltage;

means for adaptively adjusting an input current limit for the means for converting, based on an estimated output power for the means for converting; and

means for applying the input current limit to the means for converting, wherein:

the load comprises means for amplifying, the estimated output power being determined based on a power level and a frequency content of an input signal to be amplified by the means for amplifying;

if the input signal comprises relatively high frequencies, the input current limit is based on an averaged predicted output power for the means for converting; and

if the input signal comprises relatively low frequencies, the input current limit is based on an estimated instantaneous peak output power for the means for converting.

24. The apparatus of claim 23 , further comprising means for determining an averaged predicted output power for the means for converting as the estimated output power.

25. The apparatus of claim 23 , further comprising means for sensing the input voltage, wherein the means for adaptively adjusting is configured to adaptively adjust the input current limit based on the estimated output power for the means for converting and the input voltage.

26. The apparatus of claim 23 , further comprising means for sensing the input voltage, wherein the means for adaptively adjusting comprises:

means for filtering the input signal;

means for determining a mean squared value of the filtered input signal;

means for calculating the estimated output power based on the mean squared value of the filtered input signal, a gain of the means for amplifying, and a resistance of the load;

means for dividing the estimated output power by an efficiency of at least one of the means for converting or the load, to generate an estimated input power;

means for dividing the estimated input power by the input voltage; and

means for adding a ripple value to a result of dividing the estimated input power by the input voltage, to generate the input current limit.

Assignments (1)

Continuity (1)

References Cited (29)