IP Library Granted Patent US 12,364,064
Granted Patent B2
US 12,364,064 · App. 17/383,315 · Granted Jul 15, 2025

Display device and method for manufacturing the same

Inventors: Hee Na Kim (Hwaseong-si, KR); Cha Dong Kim (Seoul, KR); In Kyung Yoo (Hwaseong-si, KR); Sang Jin Lee (Suwon-si, KR); Chong Sup Chang (Hwaseong-si, KR)
Assignee: Samsung Display Co., Ltd.
H10H20/831H01L25/0753H10H20/01H10H29/142H10H20/032
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Quick Facts
Patent No.
US 12,364,064
App. No.
17/383,315
Granted
Jul 15, 2025
Kind
B2
Abstract

A display device includes: a first alignment electrode and a second alignment electrode on a substrate, the first and second alignment electrodes extending in a first direction and being spaced apart from each other; an amorphous silicon layer on the first alignment electrode and the second alignment electrode, the amorphous silicon layer having an insulating portion covering the first alignment electrode and an electrode portion covering the second alignment electrode, the electrode portion of the amorphous silicon layer including an N-type dopant; a light emitting element on the amorphous silicon layer, one end of the light emitting element being on the insulating portion and another end of the light emitting element contacting the electrode portion of the amorphous silicon layer; a first insulating layer on the light emitting element and extending in the first direction; and a first electrode contacting the one end of the light emitting element.

Claims (28)

1. A display device comprising:

a first alignment electrode and a second alignment electrode on a substrate, the first and second alignment electrodes extending in a first direction and being spaced apart from each other;

an amorphous silicon layer on the first alignment electrode and the second alignment electrode, the amorphous silicon layer having an insulating portion covering the first alignment electrode and an electrode portion covering the second alignment electrode, the electrode portion of the amorphous silicon layer comprising an N-type dopant;

a light emitting element on the amorphous silicon layer, one end of the light emitting element being on the insulating portion and another end of the light emitting element contacting the electrode portion of the amorphous silicon layer;

a first insulating layer on the light emitting element and extending in the first direction; and

a first electrode contacting the one end of the light emitting element.

2. The display device of claim 1 , wherein the N-type dopant comprises at least one selected from among phosphorus (P), arsenic (As), and antimony (Sb).

3. The display device of claim 2 , wherein a concentration of the N-type dopant ranges from 10 15 /cm 3 to 10 20 /cm 3 .

4. The display device of claim 1 , wherein the insulating portion of the amorphous silicon layer overlaps the first electrode and the light emitting element, and the electrode portion of the amorphous silicon layer does not overlap the first electrode and the light emitting element in a direction perpendicular to the substrate.

5. The display device of claim 1 , wherein the electrode portion of the amorphous silicon layer covering the second alignment electrode has an electrode contact portion having a thickness larger than that of the insulating portion of the amorphous silicon layer.

6. The display device of claim 5 , wherein the electrode contact portion of the amorphous silicon layer contacts a side of the another end of the light emitting element, and

wherein a top surface of the electrode contact portion and a top surface of the light emitting element coincide with each other in a horizontal direction.

7. The display device of claim 1 , further comprising a second insulating layer covering the first electrode, the first insulating layer, the light emitting element, and the electrode portion of the amorphous silicon layer.

8. The display device of claim 1 , wherein the insulating portion of the amorphous silicon layer has an opening exposing the first alignment electrode, a bottom surface of the first electrode contacts a top surface of the first alignment electrode through the opening, and a bottom surface of the electrode portion contacts a top surface of the second alignment electrode.

9. A method for manufacturing a display device, the method comprising:

preparing a target substrate comprising a first alignment electrode and a second alignment electrode, the first and second alignment electrodes extending in a first direction and being spaced apart from each other;

forming an amorphous silicon layer on the first alignment electrode and the second alignment electrode;

aligning a light emitting element on the amorphous silicon layer;

forming a first insulating layer on the light emitting element and extending in the first direction;

forming a first electrode on one end of the light emitting element and the amorphous silicon layer, the first electrode contacting the one end of the light emitting element; and

forming an insulating portion of the amorphous silicon layer and an electrode portion of the amorphous silicon layer by doping an N-type dopant into a portion of the amorphous silicon layer,

wherein the insulating portion of the amorphous silicon layer covers the first alignment electrode, and the electrode portion of the amorphous silicon layer covers the second alignment electrode,

wherein one end of the light emitting element is on the insulating portion of the amorphous silicon layer, and another end of the light emitting element contacts the electrode portion of the amorphous silicon layer.

10. The method of claim 9 , wherein the electrode portion of the amorphous silicon layer is doped with the N-type dopant, and

wherein the first electrode and the light emitting element mask the insulating portion of the amorphous silicon layer such that the insulating portion is not doped with the N-type dopant.

11. The method of claim 9 , wherein the N-type dopant comprises at least one selected from among phosphorus (P), arsenic (As), and antimony (Sb).

12. The method of claim 9 , wherein the electrode portion is doped with the N-type dopant at a concentration ranging from 10 15 /cm 3 to 10 20 /cm 3 .

13. The method of claim 9 , wherein the amorphous silicon layer is formed using a halftone mask such that the amorphous silicon layer has an electrode contact portion, the electrode contact portion being a portion of the electrode portion having a thickness larger than that of the insulating portion.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2021
From: KIM, HEE NA; KIM, CHA DONG; YOO, IN KYUNG; LEE, SANG JIN; CHANG, CHONG SUP
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 057428/0186 →
Priority Claims (1)
KR 10-2020-0098270 · Aug 6, 2020 · national
Continuity (1)
Related Publication 20220045241A1 · Feb 10, 2022
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