IP Library › Granted Patent US 12,366,781
Granted Patent B2
US 12,366,781 · App. 17/913,465 · Granted Jul 22, 2025

Array substrate and display apparatus

Inventors: Yunhai Wan (Beijing, CN); Zhixiang Zou (Beijing, CN); Chuan Chen (Beijing, CN); Xuehai Gui (Beijing, CN); Peihua Sun (Beijing, CN)
Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.; BOE TECHNOLOGY GROUP CO., LTD.
G02F1/136286G02F1/134345G02F1/134372G02F1/1362G02F1/136227G02F1/1368H10D86/441H10D86/60G02F2202/16
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Quick Facts
Patent No.
US 12,366,781
App. No.
17/913,465
Granted
Jul 22, 2025
Kind
B2
Abstract

An array substrate includes sub-pixels arranged in an array, scan lines, and data lines on a base substrate, with any one of the sub-pixels including a pixel electrode and a switch transistor; wherein the pixel electrode is connected to a drain electrode of the switch transistor, a gate electrode of the switch transistor is connected to one of the scan lines, a source electrode of the switch transistor is connected to one of the data lines; and an active layer of the switch transistor of the sub-pixel is located between the pixel electrode of the sub-pixel and the data line connected to the sub-pixel.

Claims (30)

1. An array substrate, comprising sub-pixels arranged in an array, scan lines, and data lines on a base substrate, with any one of the sub-pixels comprising a pixel electrode and a switch transistor; wherein the pixel electrode is connected to a drain electrode of the switch transistor, a gate electrode of the switch transistor is connected to one of the scan lines, and a source electrode of the switch transistor is connected to one of the data lines; and

an active layer of the switch transistor of the sub-pixel is located between the pixel electrode of the sub-pixel and the data line connected to the sub-pixel,

wherein a first distance between the pixel electrode and the data line connected to the sub-pixel is greater than a second distance between the pixel electrode and the scan line connected to the switch transistor, and the active layer is formed within a range of the first distance,

wherein the data line comprises first conductive leads and second conductive leads that are alternatively connected;

the second conductive lead extends along a direction intersecting the scan line, and the first conductive lead is bent into a curve or a bend line from an extending direction of the second conductive lead adjacent to the first conductive lead to a direction away from the pixel electrode of the sub-pixel connected to the data line;

a first end of the first conductive lead is connected to a first end of the second conductive lead, and a second end of the first conductive lead is connected to a second end of a second conductive lead in a next row; an avoidance area is formed between the first conductive lead and the pixel electrode of the sub-pixel adjacent to and electrically connected to the first conductive lead, and an extension line of the second end of the second conductive lead and the active layer are located in the avoidance area.

2. The array substrate according to claim 1 , wherein a preset included angle is formed between a channel direction of the active layer and an extending direction of the scan line.

3. The array substrate according to claim 2 , wherein the channel direction of the active layer is perpendicular to the extending direction of the scan line.

4. The array substrate according to claim 2 , wherein the pixel electrode in the sub-pixel comprises strip sub-electrodes, and an included angle between the strip sub-electrode and the scan line is not 90 degrees; and in a same sub-pixel, the channel direction of the active layer is consistent with an extending direction of the strip sub-electrode of the pixel electrode.

5. The array substrate according to claim 1 , wherein a channel direction of the active layer is consistent with an extending direction of the scan line.

6. The array substrate according to claim 1 , wherein the second conductive lead is a metal lead; and the first conductive lead is a metal lead or a transparent metal oxide lead.

7. The array substrate according to claim 1 , wherein the second conductive lead and the drain electrode of the switch transistor are provided in a same layer and made of a same material; and the first conductive lead and one of the pixel electrode, a common electrode of the array substrate, a common electrode line of the array substrate, the drain electrode of the switch transistor, and the scan line are arranged in a same layer and made of a same material.

8. The array substrate according to claim 1 , wherein the pixel electrode in the sub-pixel comprises strip sub-electrodes arranged in parallel; the first conductive lead is formed in a bend line, and comprises a connecting lead segment and a first strip lead segment connected in sequence; the connecting lead segment is connected to the second conductive lead and is parallel to the scan line, and the first strip lead segment extends along a same direction as the strip sub-electrode of the pixel electrode and is electrically connected to the second conductive lead in the next row.

9. The array substrate according to claim 8 , wherein the pixel electrode is provided with a protruding portion, and the protruding portion of the pixel electrode is located on an extension line of the first strip lead segment arranged adjacent to the pixel electrode;

an extending direction of the first strip lead segment is parallel to an extending direction of the strip sub-electrode of the pixel electrode arranged adjacent to the first strip lead segment; and the first conductive lead and the pixel electrode are arranged in a same layer and made of a same material.

10. The array substrate according to claim 1 , wherein the pixel electrode in the sub-pixel comprises strip sub-electrodes; the second conductive lead comprises a second strip lead segment, and an extending direction of the second strip lead segment is parallel to an extending direction of the strip sub-electrode of the pixel electrode arranged adjacent to the second strip lead segment.

11. A display apparatus comprising an array substrate, wherein the array substrate comprises sub-pixels arranged in an array, scan lines, and data lines on a base substrate, with any one of the sub-pixels comprising a pixel electrode and a switch transistor; wherein the pixel electrode is connected to a drain electrode of the switch transistor, a gate electrode of the switch transistor is connected to one of the scan lines, and a source electrode of the switch transistor is connected to one of the data lines; and

an active layer of the switch transistor of the sub-pixel is located between the pixel electrode of the sub-pixel and the data line connected to the sub-pixel,

wherein a first distance between the pixel electrode and the data line connected to the sub-pixel is greater than a second distance between the pixel electrode and the scan line connected to the switch transistor, and the active layer is formed within a range of the first distance,

wherein the data line comprises first conductive leads and second conductive leads that are alternatively connected;

the second conductive lead extends along a direction intersecting the scan line, and the first conductive lead is bent into a curve or a bend line from an extending direction of the second conductive lead adjacent to the first conductive lead to a direction away from the pixel electrode of the sub-pixel connected to the data line;

a first end of the first conductive lead is connected to a first end of the second conductive lead, and a second end of the first conductive lead is connected to a second end of a second conductive lead in a next row; an avoidance area is formed between the first conductive lead and the pixel electrode of the sub-pixel adjacent to and electrically connected to the first conductive lead, and an extension line of the second end of the second conductive lead and the active layer are located in the avoidance area.

12. The display apparatus according to claim 11 , wherein a preset included angle is formed between a channel direction of the active layer and an extending direction of the scan line.

13. The display apparatus according to claim 12 , wherein the channel direction of the active layer is perpendicular to the extending direction of the scan line.

14. The display apparatus according to claim 12 , wherein the pixel electrode in the sub-pixel comprises strip sub-electrodes, and an included angle between the strip sub-electrode and the scan line is not 90 degrees; and in a same sub-pixel, the channel direction of the active layer is consistent with an extending direction of the strip sub-electrode of the pixel electrode.

15. The display apparatus according to claim 11 , wherein a channel direction of the active layer is consistent with an extending direction of the scan line.

16. The display apparatus according to claim 13 , wherein the second conductive lead is a metal lead; and the first conductive lead is a metal lead or a transparent metal oxide lead.

17. The display apparatus according to claim 11 , wherein the second conductive lead and the drain electrode of the switch transistor are provided in a same layer and made of a same material; and

the first conductive lead and one of the pixel electrode, a common electrode of the array substrate, a common electrode line of the array substrate, the drain electrode of the switch transistor, and the scan line are arranged in a same layer and made of a same material.

18. The display apparatus according to claim 11 , wherein the pixel electrode in the sub-pixel comprises strip sub-electrodes arranged in parallel; the first conductive lead is formed in a bend line, and comprises a connecting lead segment and a first strip lead segment connected in sequence; the connecting lead segment is connected to the second conductive lead and is parallel to the scan line, and the first strip lead segment extends along a same direction as the strip sub-electrode of the pixel electrode and is electrically connected to the second conductive lead in the next row.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2022
From: WAN, YUNHAI; ZOU, ZHIXIANG; CHEN, CHUAN; GUI, XUEHAI; SUN, PEIHUA
To: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.; BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 061505/0378 →
Priority Claims (1)
CN 202010955164.5 · Sep 11, 2020 · national
Continuity (1)
Related Publication 20230134406A1 · May 4, 2023
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